Message ID | 20220317115705.450427-9-krzysztof.kozlowski@canonical.com |
---|---|
State | New |
Headers | show
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[78.11.189.27]) by smtp.gmail.com with ESMTPSA id r65-20020a1c4444000000b0038c48dd23b9sm5824900wma.5.2022.03.17.04.57.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Mar 2022 04:57:35 -0700 (PDT) From: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> To: Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, =?utf-8?q?Andreas_F=C3=A4rber?= <afaerber@suse.de>, Manivannan Sadhasivam <mani@kernel.org>, Linus Walleij <linusw@kernel.org>, Imre Kaloz <kaloz@openwrt.org>, Krzysztof Halasa <khalasa@piap.pl>, Michael Walle <michael@walle.cc>, Mark-PK Tsai <mark-pk.tsai@mediatek.com>, Daniel Palmer <daniel@thingy.jp>, =?utf-8?q?Jonathan_Neusch=C3=A4fer?= <j.neuschaefer@gmx.net>, Palmer Dabbelt <palmer@dabbelt.com>, Paul Walmsley <paul.walmsley@sifive.com>, Nishanth Menon <nm@ti.com>, Tero Kristo <kristo@kernel.org>, Santosh Shilimkar <ssantosh@kernel.org>, Neil Armstrong <narmstrong@baylibre.com>, Dinh Nguyen <dinguyen@kernel.org>, Cristian Ciocaltea <cristian.ciocaltea@gmail.com>, Joakim Zhang <qiangqing.zhang@nxp.com>, Lucas Stach <l.stach@pengutronix.de>, Paul Cercueil <paul@crapouillou.net>, Jiaxun Yang <jiaxun.yang@flygoat.com>, Claudiu Beznea <claudiu.beznea@microchip.com>, Jason Cooper <jason@lakedaemon.net>, Paul Burton <paulburton@kernel.org>, Thomas Bogendoerfer <tsbogend@alpha.franken.de>, Birger Koblitz <mail@birger-koblitz.de>, Bert Vermeulen <bert@biot.com>, John Crispin <john@phrozen.org>, Geert Uytterhoeven <geert+renesas@glider.be>, Sagar Kadam <sagar.kadam@sifive.com>, Suman Anna <s-anna@ti.com>, Lokesh Vutla <lokeshvutla@ti.com>, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-actions@lists.infradead.org, openbmc@lists.ozlabs.org, linux-riscv@lists.infradead.org, linux-oxnas@groups.io Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Subject: [PATCH 10/18] dt-bindings: irqchip: microchip,eic: include generic schema Date: Thu, 17 Mar 2022 12:56:57 +0100 Message-Id: <20220317115705.450427-9-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220317115542.450032-1-krzysztof.kozlowski@canonical.com> References: <20220317115542.450032-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: <devicetree.vger.kernel.org> X-Mailing-List: devicetree@vger.kernel.org |
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dt-bindings: irqchip: include generic schema
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diff --git a/Documentation/devicetree/bindings/interrupt-controller/microchip,eic.yaml b/Documentation/devicetree/bindings/interrupt-controller/microchip,eic.yaml index 50003880ee6f..6ef8632b3f5e 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/microchip,eic.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/microchip,eic.yaml @@ -13,6 +13,9 @@ description: This interrupt controller is found in Microchip SoCs (SAMA7G5) and provides support for handling up to 2 external interrupt lines. +allOf: + - $ref: /schemas/interrupt-controller.yaml# + properties: compatible: enum: @@ -51,7 +54,7 @@ required: - clocks - clock-names -additionalProperties: false +unevaluatedProperties: false examples: - |
Include generic interrupt-controller.yaml schema, which enforces node naming and other generic properties. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> --- .../bindings/interrupt-controller/microchip,eic.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)