diff mbox series

[v6,11/12] bestla: Enable DMA, UART3 and UART4

Message ID 20220421095323.101811-12-miquel.raynal@bootlin.com
State New
Headers show
Series serial: 8250: dw: RZN1 DMA support | expand

Commit Message

Miquel Raynal April 21, 2022, 9:53 a.m. UTC
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 .../boot/dts/r9a06g032-rzn1d400-bestla.dts    | 35 +++++++++++++++++++
 1 file changed, 35 insertions(+)

Comments

Miquel Raynal April 22, 2022, 3:52 p.m. UTC | #1
Hi Greg & Geert,

geert@linux-m68k.org wrote on Fri, 22 Apr 2022 16:26:05 +0200:

> Hi Miquel,
> 
> On Fri, Apr 22, 2022 at 4:04 PM Greg Kroah-Hartman
> <gregkh@linuxfoundation.org> wrote:
> > On Thu, Apr 21, 2022 at 12:21:43PM +0200, Miquel Raynal wrote:  
> > > miquel.raynal@bootlin.com wrote on Thu, 21 Apr 2022 11:53:22 +0200:  
> > > > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>  
> > >
> > > Please ignore these two dts patches, they were meant for testing
> > > purposes only, sorry for the noise.  
> >
> > I can't do that, please resend a new version of the series as our tools
> > take all of the patches in a series.  
> 
> While at it, please drop patch 10/12 from the reposted series, too,
> as it should go in through the renesas-arm-dt and soc trees.

Sure, no problem.

Thanks,
Miquèl
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/r9a06g032-rzn1d400-bestla.dts b/arch/arm/boot/dts/r9a06g032-rzn1d400-bestla.dts
index f42a3ba70541..70aa026bd292 100644
--- a/arch/arm/boot/dts/r9a06g032-rzn1d400-bestla.dts
+++ b/arch/arm/boot/dts/r9a06g032-rzn1d400-bestla.dts
@@ -22,6 +22,8 @@  chosen {
 
 	aliases {
 		serial0 = &uart0;
+		serial3 = &uart3;
+
 	};
 };
 
@@ -31,6 +33,22 @@  &uart0 {
 	status = "okay";
 };
 
+&uart3 {
+	pinctrl-0 = <&pins_uart3>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&uart4 {
+	pinctrl-0 = <&pins_uart4>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&dma0 {
+	status = "okay";
+};
+
 &nand_controller {
 	pinctrl-0 = <&pins_nand>;
 	pinctrl-names = "default";
@@ -82,4 +100,21 @@  RZN1_PINMUX(104, RZN1_FUNC_UART0_I)	/* UART0_RXD */
 		>;
 		bias-disable;
 	};
+
+	pins_uart3: pins_uart3 {
+		pinmux = <
+			RZN1_PINMUX(123, RZN1_FUNC_UART3)       /* UART3_TXD */
+			RZN1_PINMUX(124, RZN1_FUNC_UART3)       /* UART3_RXD */
+			RZN1_PINMUX(125, RZN1_FUNC_UART3)       /* UART3_RTS_N */
+                >;
+		bias-disable;
+	};
+
+	pins_uart4: pins_uart4 {
+		pinmux = <
+			RZN1_PINMUX(109, RZN1_FUNC_UART4)       /* UART4_TXD */
+			RZN1_PINMUX(110, RZN1_FUNC_UART4)       /* UART4_RXD */
+                >;
+		bias-disable;
+	};
 };