Message ID | 20220927141504.3886314-3-alex.bennee@linaro.org |
---|---|
State | New |
Headers | show |
Series | gdbstub/next (MemTxAttrs, re-factoring) | expand |
On 9/27/22 07:14, Alex Bennée wrote: > Both arm_cpu_tlb_fill (for normal IO) and > arm_cpu_get_phys_page_attrs_debug (for debug access) come through > get_phys_addr which is setting the other memory attributes for the > transaction. As these are all by definition CPU accesses we can also > set the requested_type/index as appropriate. > > Signed-off-by: Alex Bennée <alex.bennee@linaro.org> > > --- > v3 > - reword commit summary > --- > target/arm/ptw.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/target/arm/ptw.c b/target/arm/ptw.c > index 2ddfc028ab..4b0dc9bd14 100644 > --- a/target/arm/ptw.c > +++ b/target/arm/ptw.c > @@ -2289,6 +2289,9 @@ bool get_phys_addr(CPUARMState *env, target_ulong address, > ARMMMUIdx s1_mmu_idx = stage_1_mmu_idx(mmu_idx); > bool is_secure = regime_is_secure(env, mmu_idx); > > + attrs->requester_type = MEMTXATTRS_CPU; This shouldn't build since you renamed the enumerator. You should use *attrs = MEMTXATTRS_CPU(env_cpu(env)). r~
diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 2ddfc028ab..4b0dc9bd14 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -2289,6 +2289,9 @@ bool get_phys_addr(CPUARMState *env, target_ulong address, ARMMMUIdx s1_mmu_idx = stage_1_mmu_idx(mmu_idx); bool is_secure = regime_is_secure(env, mmu_idx); + attrs->requester_type = MEMTXATTRS_CPU; + attrs->requester_id = env_cpu(env)->cpu_index; + if (mmu_idx != s1_mmu_idx) { /* * Call ourselves recursively to do the stage 1 and then stage 2
Both arm_cpu_tlb_fill (for normal IO) and arm_cpu_get_phys_page_attrs_debug (for debug access) come through get_phys_addr which is setting the other memory attributes for the transaction. As these are all by definition CPU accesses we can also set the requested_type/index as appropriate. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> --- v3 - reword commit summary --- target/arm/ptw.c | 3 +++ 1 file changed, 3 insertions(+)