Message ID | 20230228164752.55682-15-manivannan.sadhasivam@linaro.org |
---|---|
State | Accepted |
Commit | 84160da56dd0ce48dd8eed56237cc8be45bd55dc |
Headers | show |
Series | Qcom: Fix PCI I/O range defined in devicetree | expand |
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 92aa2b081901..210b24e510c5 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -1494,8 +1494,8 @@ pcie: pci@1b500000 { num-lanes = <1>; #address-cells = <3>; #size-cells = <2>; - ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000>, /* I/O */ - <0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* mem */ + ranges = <0x81000000 0x0 0x00000000 0x0fe00000 0x0 0x00100000>, /* I/O */ + <0x82000000 0x0 0x08000000 0x08000000 0x0 0x07e00000>; /* mem */ interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "msi"; #interrupt-cells = <1>;
To maintain the uniformity, let's use the 0x prefix for the values of ranges property. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> --- arch/arm/boot/dts/qcom-apq8064.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)