diff mbox series

[PATCH-for-9.1,09/12] accel/tcg/internal: Check for USER_ONLY definition instead of SOFTMMU

Message ID 20240313213339.82071-10-philmd@linaro.org
State New
Headers show
Series accel/tcg: Finish replacing SOFTMMU -> SYSTEM | expand

Commit Message

Philippe Mathieu-Daudé March 13, 2024, 9:33 p.m. UTC
Since we *might* have user emulation with softmmu,
replace the system emulation check by !user emulation one.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 accel/tcg/internal-target.h | 6 +++---
 accel/tcg/tb-hash.h         | 4 ++--
 accel/tcg/tcg-all.c         | 2 +-
 3 files changed, 6 insertions(+), 6 deletions(-)

Comments

Richard Henderson March 15, 2024, 9:25 p.m. UTC | #1
On 3/13/24 11:33, Philippe Mathieu-Daudé wrote:
> Since we *might* have user emulation with softmmu,
> replace the system emulation check by !user emulation one.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   accel/tcg/internal-target.h | 6 +++---
>   accel/tcg/tb-hash.h         | 4 ++--
>   accel/tcg/tcg-all.c         | 2 +-
>   3 files changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/accel/tcg/internal-target.h b/accel/tcg/internal-target.h
> index 4e36cf858e..b22b29c461 100644
> --- a/accel/tcg/internal-target.h
> +++ b/accel/tcg/internal-target.h
> @@ -24,7 +24,7 @@
>   #define assert_memory_lock()
>   #endif
>   
> -#if defined(CONFIG_SOFTMMU) && defined(CONFIG_DEBUG_TCG)
> +#if !defined(CONFIG_USER_ONLY) && defined(CONFIG_DEBUG_TCG)
>   void assert_no_pages_locked(void);
>   #else
>   static inline void assert_no_pages_locked(void) { }
> @@ -62,12 +62,12 @@ void tb_unlock_page1(tb_page_addr_t, tb_page_addr_t);
>   void tb_unlock_pages(TranslationBlock *);
>   #endif
>   
> -#ifdef CONFIG_SOFTMMU
> +#ifndef CONFIG_USER_ONLY
>   void tb_invalidate_phys_range_fast(ram_addr_t ram_addr,
>                                      unsigned size,
>                                      uintptr_t retaddr);
>   G_NORETURN void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr);
> -#endif /* CONFIG_SOFTMMU */
> +#endif /* !CONFIG_USER_ONLY */
>   
>   TranslationBlock *tb_gen_code(CPUState *cpu, vaddr pc,
>                                 uint64_t cs_base, uint32_t flags,

Ok.


> diff --git a/accel/tcg/tb-hash.h b/accel/tcg/tb-hash.h
> index a0c61f25cd..45a484ce82 100644
> --- a/accel/tcg/tb-hash.h
> +++ b/accel/tcg/tb-hash.h
> @@ -25,7 +25,7 @@
>   #include "qemu/xxhash.h"
>   #include "tb-jmp-cache.h"
>   
> -#ifdef CONFIG_SOFTMMU
> +#ifndef CONFIG_USER_ONLY
>   
>   /* Only the bottom TB_JMP_PAGE_BITS of the jump cache hash bits vary for
>      addresses on the same page.  The top bits are the same.  This allows
> @@ -58,7 +58,7 @@ static inline unsigned int tb_jmp_cache_hash_func(vaddr pc)
>       return (pc ^ (pc >> TB_JMP_CACHE_BITS)) & (TB_JMP_CACHE_SIZE - 1);
>   }
>   
> -#endif /* CONFIG_SOFTMMU */
> +#endif /* CONFIG_USER_ONLY */
>   
>   static inline
>   uint32_t tb_hash_func(tb_page_addr_t phys_pc, vaddr pc,

Not ok, this is really softmmu related.  If we have user-only softmmu, then we'll need to 
take multiple mappings into account, just like this.

Perhaps add a comment so it's easy to see this (and whichever else) have already been audited?


> diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c
> index c6619f5b98..929af1f64c 100644
> --- a/accel/tcg/tcg-all.c
> +++ b/accel/tcg/tcg-all.c
> @@ -116,7 +116,7 @@ static int tcg_init_machine(MachineState *ms)
>       tb_htable_init();
>       tcg_init(s->tb_size * MiB, s->splitwx_enabled, max_cpus);
>   
> -#if defined(CONFIG_SOFTMMU)
> +#if !defined(CONFIG_USER_ONLY)
>       /*
>        * There's no guest base to take into account, so go ahead and
>        * initialize the prologue now.

With system, we *know* softmmu must be used.
With user-only, we will want to wait until after command-line processing.

Ok with comment change to "never a guest base".


r~
diff mbox series

Patch

diff --git a/accel/tcg/internal-target.h b/accel/tcg/internal-target.h
index 4e36cf858e..b22b29c461 100644
--- a/accel/tcg/internal-target.h
+++ b/accel/tcg/internal-target.h
@@ -24,7 +24,7 @@ 
 #define assert_memory_lock()
 #endif
 
-#if defined(CONFIG_SOFTMMU) && defined(CONFIG_DEBUG_TCG)
+#if !defined(CONFIG_USER_ONLY) && defined(CONFIG_DEBUG_TCG)
 void assert_no_pages_locked(void);
 #else
 static inline void assert_no_pages_locked(void) { }
@@ -62,12 +62,12 @@  void tb_unlock_page1(tb_page_addr_t, tb_page_addr_t);
 void tb_unlock_pages(TranslationBlock *);
 #endif
 
-#ifdef CONFIG_SOFTMMU
+#ifndef CONFIG_USER_ONLY
 void tb_invalidate_phys_range_fast(ram_addr_t ram_addr,
                                    unsigned size,
                                    uintptr_t retaddr);
 G_NORETURN void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr);
-#endif /* CONFIG_SOFTMMU */
+#endif /* !CONFIG_USER_ONLY */
 
 TranslationBlock *tb_gen_code(CPUState *cpu, vaddr pc,
                               uint64_t cs_base, uint32_t flags,
diff --git a/accel/tcg/tb-hash.h b/accel/tcg/tb-hash.h
index a0c61f25cd..45a484ce82 100644
--- a/accel/tcg/tb-hash.h
+++ b/accel/tcg/tb-hash.h
@@ -25,7 +25,7 @@ 
 #include "qemu/xxhash.h"
 #include "tb-jmp-cache.h"
 
-#ifdef CONFIG_SOFTMMU
+#ifndef CONFIG_USER_ONLY
 
 /* Only the bottom TB_JMP_PAGE_BITS of the jump cache hash bits vary for
    addresses on the same page.  The top bits are the same.  This allows
@@ -58,7 +58,7 @@  static inline unsigned int tb_jmp_cache_hash_func(vaddr pc)
     return (pc ^ (pc >> TB_JMP_CACHE_BITS)) & (TB_JMP_CACHE_SIZE - 1);
 }
 
-#endif /* CONFIG_SOFTMMU */
+#endif /* CONFIG_USER_ONLY */
 
 static inline
 uint32_t tb_hash_func(tb_page_addr_t phys_pc, vaddr pc,
diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c
index c6619f5b98..929af1f64c 100644
--- a/accel/tcg/tcg-all.c
+++ b/accel/tcg/tcg-all.c
@@ -116,7 +116,7 @@  static int tcg_init_machine(MachineState *ms)
     tb_htable_init();
     tcg_init(s->tb_size * MiB, s->splitwx_enabled, max_cpus);
 
-#if defined(CONFIG_SOFTMMU)
+#if !defined(CONFIG_USER_ONLY)
     /*
      * There's no guest base to take into account, so go ahead and
      * initialize the prologue now.