Show patches with: State = Action Required       |    Archived = No       |   2656 patches
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Patch Series S/W/F Date Submitter Delegate State
[ARM] neon-testgen.ml typo --- 2015-10-29 Jim Wilson New
[Docs] Reword the documentation for -fdump-rtl- --- 2015-10-29 James Greenhalgh New
[ARM/AArch64] PR 68088: Fix RTL checking ICE due to subregs inside accumulator forwarding check --- 2015-10-29 Kyrylo Tkachov New
[ARM] libgcc: include crtfastmath.o --- 2015-10-29 Christophe Lyon New
[C] fix for ICE with -g --- 2015-10-28 Jim Wilson New
[RFC,tree-ifcombine] Making tree-ifcombine more friendly for conditional comparisons generation --- 2015-10-28 Kyrylo Tkachov New
[ARM/AArch64] PR 68088: Fix RTL checking ICE due to subregs inside accumulator forwarding check --- 2015-10-28 Kyrylo Tkachov New
[wwwdocs] Mention arm target attributes and pragmas in GCC 6 changes --- 2015-10-26 Kyrylo Tkachov New
[simplify-rtx,2/2] Use constants from pool when simplifying binops --- 2015-10-20 Kyrylo Tkachov New
[AArch64,1/2] Add fmul-by-power-of-2+fcvt optimisation --- 2015-10-20 Kyrylo Tkachov New
[AArch64] Fix insn types --- 2015-10-20 Kyrylo Tkachov New
[simplify-rtx,2/2] Use constants from pool when simplifying binops --- 2015-10-19 Kyrylo Tkachov New
[AArch64,1/2] Add fmul-by-power-of-2+fcvt optimisation --- 2015-10-19 Kyrylo Tkachov New
[5/7] Allow gimple debug stmt in widen mode --- 2015-10-18 Kugan Vivekanandarajah New
[AArch64,63304] Fix issue with global state. --- 2015-10-16 Ramana Radhakrishnan New
[testsuite] Fix potential race conditions in gfortran tests --- 2015-10-16 Christophe Lyon New
[2/7] Add new type promotion pass --- 2015-10-15 Kugan Vivekanandarajah New
[1/7] Add new tree code SEXT_EXPR --- 2015-10-15 Kugan Vivekanandarajah New
[5/7] Allow gimple debug stmt in widen mode --- 2015-10-15 Kugan Vivekanandarajah New
[ARM,4.9/5,Backport] PR target/67929 Tighten vfp3_const_double_for_bits checks --- 2015-10-14 Kyrylo Tkachov New
[AArch64_be] Fix vtbl[34] and vtbx4 --- 2015-10-13 Christophe Lyon New
[1/7] Add new tree code SEXT_EXPR --- 2015-10-11 Kugan Vivekanandarajah New
[3/7] Optimize ZEXT_EXPR with tree-vrp --- 2015-10-11 Kugan Vivekanandarajah New
[PR,target/67366,2/2,gimple-fold.c] Support movmisalign optabs in gimple-fold.c --- 2015-10-08 Ramana Radhakrishnan New
[PR,target/67366,1/2,ARM] - Add movmisalignhi / si patterns --- 2015-10-08 Ramana Radhakrishnan New
[3/7] Optimize ZEXT_EXPR with tree-vrp --- 2015-10-07 Kugan Vivekanandarajah New
[3/3,ARM] PR63870 Enable test cases --- 2015-10-06 Charles Baylis New
[3/7] Optimize ZEXT_EXPR with tree-vrp --- 2015-10-06 Kugan Vivekanandarajah New
[AARCH64] Add missing entries in iterator vwcore --- 2015-10-06 Kugan Vivekanandarajah New
[ARM] armv8 linux toolchain asan testcase fail due to stl missing conditional code --- 2015-10-02 Kyrylo Tkachov New
[AArch64] Improve SIMD concatenation with zeroes --- 2015-10-02 James Greenhalgh New
[AARCH64] Add missing entries in iterator vwcore --- 2015-10-01 Kugan Vivekanandarajah New
[match.pd] Add a simplify rule for x * copysign (1.0, y); --- 2015-10-01 James Greenhalgh New
[ARM] Use vector wide add for mixed-mode adds --- 2015-10-01 Michael Collison New
Optimize certain end of loop conditions into min/max operation --- 2015-10-01 Michael Collison New
Optimize certain end of loop conditions into min/max operation --- 2015-10-01 Michael Collison New
Optimize certain end of loop conditions into min/max operation --- 2015-10-01 Michael Collison New
[ARM] armv8 linux toolchain asan testcase fail due to stl missing conditional code --- 2015-09-30 Kyrylo Tkachov New
Optimize certain end of loop conditions into min/max operation --- 2015-09-30 Michael Collison New
[Prototype,AArch64,ifcvt,4/3] Wire up the new if-convert costs hook for AArch64 --- 2015-09-25 James Greenhalgh New
[ifcvt,3/3] Create a new target hook for deciding profitability of noce if-conversion --- 2015-09-25 James Greenhalgh New
[ifcvt,2/3] Move noce_if_info in to ifcvt.h --- 2015-09-25 James Greenhalgh New
[ifcvt,1/3] Factor out cost calculations from noce cases --- 2015-09-25 James Greenhalgh New
[1/2,AArch64/ARM] Give AArch64 ROR (Immediate) a new type attribute --- 2015-09-25 Kyrylo Tkachov New
[1/2,AArch64/ARM] Give AArch64 ROR (Immediate) a new type attribute --- 2015-09-25 James Greenhalgh New
[tree-inline,obvious] Delete redundant count_insns_seq --- 2015-09-23 Kyrylo Tkachov New
[ARM] Use vector wide add for mixed-mode adds --- 2015-09-23 Kyrylo Tkachov New
[ARM] Use vector wide add for mixed-mode adds --- 2015-09-22 Michael Collison New
[RFC] PR tree-optimization/67628: Make tree ifcombine more symmetric and interactions with dom --- 2015-09-22 Kyrylo Tkachov New
[4/4,ARM] Add attribute/pragma target fpu= --- 2015-09-18 Kyrylo Tkachov New
[3/4,ARM] Add attribute/pragma target fpu= --- 2015-09-18 Kyrylo Tkachov New
Optimize certain end of loop conditions into min/max operation --- 2015-09-18 Michael Collison New
[AArch64] Implement copysign[ds]f3 --- 2015-09-16 James Greenhalgh New
[ARM] Fix arm bootstrap failure due to -Werror=shift-negative-value --- 2015-09-15 Kyrylo Tkachov New
[wwwdocs,AArch64] Add entry for target attributes and pragmas --- 2015-09-14 Kyrylo Tkachov New
[RTL-ifcvt] PR rtl-optimization/67465: Handle pairs of complex+simple blocks and empty blocks more gracefully --- 2015-09-11 Kyrylo Tkachov New
[AArch64] Use logics_imm type for 2nd alternative of *and<mode>3nr_compare0 --- 2015-09-10 Kyrylo Tkachov New
[PR,57195] Allow mode iterators inside angle brackets --- 2015-09-09 Michael Collison New
[AArch64] Fix vcvt_high_f64_f32 and vcvt_figh_f32_f64 intrinsics. --- 2015-09-09 James Greenhalgh New
Teach RTL ifcvt to handle multiple simple set instructions --- 2015-09-08 James Greenhalgh New
[ARM,3/3] Expand mod by power of 2 --- 2015-09-08 Kyrylo Tkachov New
[5/7] Allow gimple debug stmt in widen mode --- 2015-09-08 Kugan Vivekanandarajah New
[RTL-ifcvt] PR rtl-optimization/67465: Do not ifcvt complex blocks if the else block is empty --- 2015-09-07 Kyrylo Tkachov New
[7/7] Adjust-arm-test cases --- 2015-09-07 Kugan Vivekanandarajah New
[6/7] Temporary workaround to get aarch64 bootstrap --- 2015-09-07 Kugan Vivekanandarajah New
[5/7] Allow gimple debug stmt in widen mode --- 2015-09-07 Kugan Vivekanandarajah New
[5/7] Allow gimple debug stmt in widen mode --- 2015-09-07 Kugan Vivekanandarajah New
[4/7] Use correct promoted mode sign for result of GIMPLE_CALL --- 2015-09-07 Kugan Vivekanandarajah New
[3/7] Optimize ZEXT_EXPR with tree-vrp --- 2015-09-07 Kugan Vivekanandarajah New
[2/7] Add new type promotion pass --- 2015-09-07 Kugan Vivekanandarajah New
[1/7] Add new tree code SEXT_EXPR --- 2015-09-07 Kugan Vivekanandarajah New
[ARM] : Add TARGET_OPTION[RESTORE,SAVE,PRINT] hooks --- 2015-09-04 Kyrylo Tkachov New
[AArch64_be] Fix vldX/vstX AdvSIMD intrinsics --- 2015-09-02 Christophe Lyon New
[AArch64,2/3] Implement negcc, notcc optabs --- 2015-09-01 Kyrylo Tkachov New
[wwwdocs,AArch64] Add entry for target attributes and pragmas --- 2015-09-01 Kyrylo Tkachov New
[testsuite] Clean up effective_target cache --- 2015-09-01 Christophe Lyon New
[AArch64] Use preferred aliases for CSNEG, CSINC, CSINV --- 2015-09-01 Kyrylo Tkachov New
[PR,other/67320] Fix wide add standard names --- 2015-08-25 Michael Collison New
[PR,57195] Allow mode iterators inside angle brackets --- 2015-08-25 Michael Collison New
[ARM] Use vector wide add for mixed-mode adds --- 2015-08-22 Michael Collison New
[ARM] Use vector wide add for mixed-mode adds --- 2015-08-18 Michael Collison New
PR target/67127: [ARM] Avoiding odd-number ldrd/strd in movdi introduced a regression on armeb-linux-gnueabihf --- 2015-08-07 Yvan Roux New
[RFC] Elimination of zext/sext - type promotion pass --- 2015-08-05 Kugan Vivekanandarajah New
[ARM] Fix vget_lane for big-endian targets --- 2015-08-04 Christophe Lyon New
[1/2] Allow REG_EQUAL for ZERO_EXTRACT --- 2015-07-28 Kugan Vivekanandarajah New
Optimize certain end of loop conditions into min/max operation --- 2015-07-27 Michael Collison New
[PR66726] Factor conversion out of COND_EXPR --- 2015-07-27 Kugan Vivekanandarajah New
[ARM] Optimize compare against smin/umin --- 2015-07-26 Michael Collison New
[AArch64] fix typo in vec_store_lanesoi_lane<mode> --- 2015-07-22 Charles Baylis New
[1/2] Allow REG_EQUAL for ZERO_EXTRACT --- 2015-07-20 Kugan Vivekanandarajah New
[ARM] Fix vget_lane for big-endian targets --- 2015-07-16 Christophe Lyon New
[PR66726] Factor conversion out of COND_EXPR --- 2015-07-16 Kugan Vivekanandarajah New
[genmatch] reject empty c_expr --- 2015-07-15 Prathamesh Kulkarni New
[DRIVER] Wrong C++ include paths when configuring with "--with-sysroot=/" --- 2015-07-15 Yvan Roux New
[PR66726] Factor conversion out of COND_EXPR --- 2015-07-15 Kugan Vivekanandarajah New
[ARM] stop changing signedness in PROMOTE_MODE --- 2015-07-10 Jim Wilson New
[testsuite] Disable attr_thumb.c test when Thumb mode is not supported. --- 2015-07-10 Christophe Lyon New
[PR66726] Factor conversion out of COND_EXPR --- 2015-07-09 Kugan Vivekanandarajah New
[testsuite] Disable attr_thumb.c test when Thumb mode is not supported. --- 2015-07-09 Christophe Lyon New
[PR66726] Factor conversion out of COND_EXPR --- 2015-07-07 Kugan Vivekanandarajah New
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