Show patches with: Submitter = James Greenhalgh       |    State = Action Required       |    Archived = No       |   90 patches
Patch Series S/W/F Date Submitter Delegate State
[AArch64] Do not perform a vector splat for vector initialisation if it is not useful [AArch64] Do not perform a vector splat for vector initialisation if it is not useful --- 2017-12-11 James Greenhalgh New
[combine] Don't create vector mode ZERO_EXTEND from subregs [combine] Don't create vector mode ZERO_EXTEND from subregs --- 2017-12-11 James Greenhalgh New
[obvious,arm,testsuite] Fixup expected location in require-pic-register-loc.c [obvious,arm,testsuite] Fixup expected location in require-pic-register-loc.c --- 2017-10-26 James Greenhalgh New
[AArch64,2/2] Fix memory sizes to load/store patterns Untitled series #3987 --- 2017-09-12 James Greenhalgh New
[AArch64,obvious] Fix register constraints for aarch64_ml[as]_elt_merge<mode> [AArch64,obvious] Fix register constraints for aarch64_ml[as]_elt_merge<mode> --- 2017-08-31 James Greenhalgh New
Turn -fexcess-precision=fast on when in -ffast-math --- 2016-12-20 James Greenhalgh New
Undermine the jump threading cost model to fix PR77445. --- 2016-12-15 James Greenhalgh New
[PR78561,PowerPC] Revert to old behaviour for counting constant pools --- 2016-12-07 James Greenhalgh New
[testsuite,obvious] Use setjmp, not sigsetjmp in gcc.dg/pr78582.c --- 2016-12-01 James Greenhalgh New
[2/2,PR78561] Recalculate constant pool size before emitting it --- 2016-12-01 James Greenhalgh New
[1/2,PR78561] Rename get_pool_size to get_pool_size_upper_bound --- 2016-12-01 James Greenhalgh New
[doc] Document _Float16 availability on ARM/AArch64 --- 2016-11-30 James Greenhalgh New
[i386] PR78509 - TARGET_C_EXCESS_PRECISION should not return "unpredictable" for EXCESS_PRECISION_TYPE_STANDARD --- 2016-11-24 James Greenhalgh New
[5/17] Add -fpermitted-flt-eval-methods=[c11|ts-18661-3] --- 2016-11-14 James Greenhalgh New
[ARM,17/17] Enable _Float16 for ARM. --- 2016-11-11 James Greenhalgh New
[16/17,libgcc,ARM] Half to double precision conversions --- 2016-11-11 James Greenhalgh New
[15/17,libgcc,ARM] Add double to half conversions. --- 2016-11-11 James Greenhalgh New
[14/17,libgcc,ARM] Generalise float-to-half conversion function. --- 2016-11-11 James Greenhalgh New
[AArch64,13/17] Enable _Float16 for AArch64 --- 2016-11-11 James Greenhalgh New
[libgcc,AArch64,12/17] Enable hfmode soft-float conversions and truncations --- 2016-11-11 James Greenhalgh New
[AArch64,11/17] Add floatdihf2 and floatunsdihf2 patterns --- 2016-11-11 James Greenhalgh New
[testsuite,10/17] Add options for floatN when checking effective target for support --- 2016-11-11 James Greenhalgh New
[8/17] Make _Float16 available if HFmode is available --- 2016-11-11 James Greenhalgh New
[7/17] Delete TARGET_FLT_EVAL_METHOD and poison it. --- 2016-11-11 James Greenhalgh New
[4/17] Implement TARGET_C_EXCESS_PRECISION for m68k --- 2016-11-11 James Greenhalgh New
[3/17] Implement TARGET_C_EXCESS_PRECISION for s390 --- 2016-11-11 James Greenhalgh New
[2/17] Implement TARGET_C_EXCESS_PRECISION for i386 --- 2016-11-11 James Greenhalgh New
[1/17] Add a new target hook for describing excess precision intentions --- 2016-11-11 James Greenhalgh New
[LIBGCC] Avoid count_leading_zeros with undefined result (PR 78067) --- 2016-11-10 James Greenhalgh New
[AArch64] aarch64-c.o should depend on TARGET_H --- 2016-11-01 James Greenhalgh New
Remove all uses of TARGET_FLT_EVAL_METHOD_NON_DEFAULT and poison it --- 2016-09-22 James Greenhalgh New
[libgcc] Enable HCmode multiply and divide (mulhc3/divhc3) --- 2016-09-07 James Greenhalgh New
[RFC] Modify excess precision logic to permit FLT_EVAL_METHOD=16 --- 2016-09-06 James Greenhalgh New
Fix wrong code on aarch64 due to paradoxical subreg --- 2016-08-04 James Greenhalgh New
[AArch64,Obvious] Fix Bootstrap for my mistake in r238977 --- 2016-08-02 James Greenhalgh New
[RFC,4/2,v3] Refactor noce_try_cmove_arith --- 2016-07-20 James Greenhalgh New
[RFC:,3/2,v3] Don't expand a conditional move between identical sources --- 2016-07-20 James Greenhalgh New
[RFC:,2/2,v3] Introduce a new cost model for ifcvt. --- 2016-07-20 James Greenhalgh New
[Re:,RFC:,1/2,v3] New target hook: max_noce_ifcvt_seq_cost --- 2016-07-20 James Greenhalgh New
[RFC:,6/6,v2] Remove second cost model from noce_try_store_flag_mask --- 2016-06-21 James Greenhalgh New
[RFC:,5/6,v2] Improve the cost model for multiple-sets --- 2016-06-21 James Greenhalgh New
[RFC:,4/6,v2] Modify cost model for noce_cmove_arith --- 2016-06-21 James Greenhalgh New
[RFC:,3/6,v2] Remove if_info->branch_cost --- 2016-06-21 James Greenhalgh New
[RFC:,2/6,v2] Factor out the comparisons against magic numbers in ifcvt --- 2016-06-21 James Greenhalgh New
[RFC:,1/6,v2] New target hook: max_noce_ifcvt_seq_cost --- 2016-06-21 James Greenhalgh New
[ARM,arm_neon.h] s/__FAST_MATH/__FAST_MATH__/g --- 2016-06-16 James Greenhalgh New
[AArch64] Add some more missing intrinsics --- 2016-06-13 James Greenhalgh New
[AArch64] Fixup to fcvt patterns added in r237200 --- 2016-06-10 James Greenhalgh New
[AArch64] Refactor and clean up some of the sched_fusion handling --- 2016-06-03 James Greenhalgh New
[RFC:,6/6] Remove second cost model from noce_try_store_flag_mask --- 2016-06-02 James Greenhalgh New
[RFC:,5/6] Improve the cost model for multiple-sets --- 2016-06-02 James Greenhalgh New
[RFC:,4/6] Modify cost model for noce_cmove_arith --- 2016-06-02 James Greenhalgh New
[RFC:,1/6] New target hook: rtx_branch_cost --- 2016-06-02 James Greenhalgh New
[AArch64,2/2] Some more cleanup of ldp/stp generation --- 2016-05-17 James Greenhalgh New
[AArch64,1/2] Refactor aarch64_operands_ok_for_ldpstp, aarch64_operands_adjust_ok_for_ldpstp --- 2016-05-17 James Greenhalgh New
[AArch64] Delete ASM_OUTPUT_DEF and fallback to default .set directive --- 2016-05-17 James Greenhalgh New
[AArch64] Simplify reduc_plus_scal_v2[sd]f sequence --- 2016-05-17 James Greenhalgh New
[obvious] Fix indentation in c-typeck.c parser_build_unary_op --- 2016-05-17 James Greenhalgh New
[obvious,AArch64] Wrap SHIFT_COUNT_TRUNCATED in brackets --- 2016-05-17 James Greenhalgh New
[AArch64,trivial] Don't define a macro when a variable will do --- 2016-05-17 James Greenhalgh New
[AArch64,3/3] Fix up for pr70133 --- 2016-04-11 James Greenhalgh New
[AArch64,1/3] Enable CRC by default for armv8.1-a --- 2016-04-06 James Greenhalgh New
[ARM] Delete ASM_OUTPUT_DEF and fall back to default .set directive --- 2016-03-31 James Greenhalgh New
[testsuite] Change xfail conditions for bb-slp-34.c --- 2016-03-03 James Greenhalgh New
Gate vect-mask-store-move-1.c correctly, and actually output the dump --- 2016-02-09 James Greenhalgh New
[AArch64] Restrict 16-bit sqrdml{sa}h instructions to FP_LO_REGS --- 2016-01-26 James Greenhalgh New
[Obvious] gcc.dg/vect/bb-slp-pr68892.c requires vectorization of doubles --- 2016-01-22 James Greenhalgh New
[AArch64] GCC 6 regression in vector performance. - Fix vector initialization to happen with lane load instructions. --- 2016-01-20 James Greenhalgh New
[AArch64] Remove AARCH64_EXTRA_TUNE_RECIP_SQRT from Cortex-A57 tuning --- 2016-01-11 James Greenhalgh New
[AArch64] Use software sqrt expansion always for -mlow-precision-recip-sqrt --- 2016-01-11 James Greenhalgh New
[ifcvt] Add a new parameter to limit if-conversion --- 2015-12-18 James Greenhalgh New
Backport: [Patch AArch64] Reinstate CANNOT_CHANGE_MODE_CLASS to fix pr67609 --- 2015-12-18 James Greenhalgh New
[testsuite] Skip gcc.dg/ifcvt-4.c for targets on which it may not work --- 2015-12-18 James Greenhalgh New
[AArch64] Add register constraints to add<mode>3_pluslong --- 2015-12-04 James Greenhalgh New
[AArch64] Reinstate CANNOT_CHANGE_MODE_CLASS to fix pr67609 --- 2015-11-27 James Greenhalgh New
[ARM] Add support for Cortex-A35 --- 2015-11-16 James Greenhalgh New
[AArch64] Add support for Cortex-A35 --- 2015-11-16 James Greenhalgh New
[5/Vect] Partial backport of r228751 (pr68238) --- 2015-11-10 James Greenhalgh New
[ifcvt] Teach RTL ifcvt to handle multiple simple set instructions --- 2015-11-04 James Greenhalgh New
[Docs] Reword the documentation for -fdump-rtl- --- 2015-10-29 James Greenhalgh New
[AArch64] Improve SIMD concatenation with zeroes --- 2015-10-02 James Greenhalgh New
[match.pd] Add a simplify rule for x * copysign (1.0, y); --- 2015-10-01 James Greenhalgh New
[Prototype,AArch64,ifcvt,4/3] Wire up the new if-convert costs hook for AArch64 --- 2015-09-25 James Greenhalgh New
[ifcvt,3/3] Create a new target hook for deciding profitability of noce if-conversion --- 2015-09-25 James Greenhalgh New
[ifcvt,2/3] Move noce_if_info in to ifcvt.h --- 2015-09-25 James Greenhalgh New
[ifcvt,1/3] Factor out cost calculations from noce cases --- 2015-09-25 James Greenhalgh New
[1/2,AArch64/ARM] Give AArch64 ROR (Immediate) a new type attribute --- 2015-09-25 James Greenhalgh New
[AArch64] Implement copysign[ds]f3 --- 2015-09-16 James Greenhalgh New
[AArch64] Fix vcvt_high_f64_f32 and vcvt_figh_f32_f64 intrinsics. --- 2015-09-09 James Greenhalgh New
Teach RTL ifcvt to handle multiple simple set instructions --- 2015-09-08 James Greenhalgh New