Toggle navigation
Patchwork
qemu-devel
Patches
Bundles
About this project
Login
Register
Mail settings
Show patches with
: Series =
hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support
| State =
Action Required
| Archived =
No
| 8 patches
Series
Submitter
State
any
Action Required
New
Under Review
Accepted
Rejected
RFC
Not Applicable
Changes Requested
Awaiting Upstream
Superseded
Deferred
Search
Archived
No
Yes
Both
Delegate
------
Nobody
andy.doan@linaro.org
andy.doan@linaro.org
Apply
Patch
Series
S/W/F
Date
Submitter
Delegate
State
[v2,14/16] hw/riscv: microchip_pfsoc: Hook GPIO controllers
hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support
-
-
-
2020-08-29
Bin Meng
New
[v2,13/16] hw/riscv: microchip_pfsoc: Connect 2 Cadence GEMs
hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support
-
-
-
2020-08-29
Bin Meng
New
[v2,12/16] hw/arm: xlnx: Set all boards' GEM 'phy-addr' property value to 23
hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support
-
-
-
2020-08-29
Bin Meng
New
[v2,09/16] hw/dma: Add SiFive platform DMA controller emulation
hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support
-
-
-
2020-08-29
Bin Meng
New
[v2,08/16] hw/riscv: microchip_pfsoc: Connect a Cadence SDHCI controller and an SD card
hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support
-
-
-
2020-08-29
Bin Meng
New
[v2,05/16] hw/char: Add Microchip PolarFire SoC MMUART emulation
hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support
-
-
-
2020-08-29
Bin Meng
New
[v2,03/16] target/riscv: cpu: Set reset vector based on the configured property value
hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support
-
-
-
2020-08-29
Bin Meng
New
[v2,01/16] target/riscv: cpu: Add a new 'resetvec' property
hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support
-
-
-
2020-08-29
Bin Meng
New