Show patches with: Submitter = LIU Zhiwei       |    Archived = No       |   201 patches
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Patch Series S/W/F Date Submitter Delegate State
[2/3] fpu/softfloat: Define convert operations for bfloat16 Implement blfoat16 in softfloat --- 2020-08-13 LIU Zhiwei New
[2/2] target/riscv: fix vector index load/store constraints Untitled series #58837 --- 2020-07-21 LIU Zhiwei New
[RFC,7/8] fpu/softfloat: define covert operation for bfloat16 Implement blfoat16 in softfloat --- 2020-07-12 LIU Zhiwei New
[RFC,6/8] fpu/softfloat: define operation for bfloat16 Implement blfoat16 in softfloat --- 2020-07-12 LIU Zhiwei New
[RFC,4/8] fpu/softfloat: add pack and unpack interfaces for bfloat16 Implement blfoat16 in softfloat --- 2020-07-12 LIU Zhiwei New
[RFC,3/8] fpu/softfloat: add FloatFmt for bfloat16 Implement blfoat16 in softfloat --- 2020-07-12 LIU Zhiwei New
[11/11] riscv: Add configure script Untitled series #59037 --- 2020-07-11 LIU Zhiwei New
[10/11] riscv: Implement payload load interfaces Untitled series #59037 --- 2020-07-11 LIU Zhiwei New
[09/11] riscv: Define riscv struct reginfo Untitled series #59037 --- 2020-07-11 LIU Zhiwei New
[08/11] riscv: Add standard test case Untitled series #59037 --- 2020-07-11 LIU Zhiwei Superseded
[04/11] riscv: Add RV64F instructions description Untitled series #59037 --- 2020-07-11 LIU Zhiwei New
[02/11] riscv: Add RV64M instructions description Untitled series #59037 --- 2020-07-11 LIU Zhiwei New
[v12,60/61] target/riscv: vector compress instruction target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,59/61] target/riscv: vector register gather instruction target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,57/61] target/riscv: floating-point scalar move instructions target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,56/61] target/riscv: integer scalar move instruction target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,53/61] target/riscv: vector iota instruction target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,50/61] target/riscv: vector mask population count vmpopc target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,48/61] target/riscv: vector widening floating-point reduction instructions target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,46/61] target/riscv: vector wideing integer reduction instructions target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,45/61] target/riscv: vector single-width integer reduction instructions target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,44/61] target/riscv: narrowing floating-point/integer type-convert instructions target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,42/61] target/riscv: vector floating-point/integer type-convert instructions target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,39/61] target/riscv: vector floating-point compare instructions target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,38/61] target/riscv: vector floating-point sign-injection instructions target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,37/61] target/riscv: vector floating-point min/max instructions target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,36/61] target/riscv: vector floating-point square-root instruction target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,34/61] target/riscv: vector single-width floating-point fused multiply-add instructions target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,32/61] target/riscv: vector single-width floating-point multiply/divide instructions target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,29/61] target/riscv: vector narrowing fixed-point clip instructions target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,28/61] target/riscv: vector single-width scaling shift instructions target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,25/61] target/riscv: vector single-width averaging add and subtract target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,20/61] target/riscv: vector widening integer multiply instructions target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,18/61] target/riscv: vector single-width integer multiply instructions target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,15/61] target/riscv: vector narrowing integer right shift instructions target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,13/61] target/riscv: vector bitwise logical instructions target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,12/61] target/riscv: vector integer add-with-carry / subtract-with-borrow instructions target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,11/61] target/riscv: vector widening integer add and subtract target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,09/61] target/riscv: add vector amo operations target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,08/61] target/riscv: add fault-only-first unit stride load target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,06/61] target/riscv: add vector stride load and store instructions target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,04/61] target/riscv: add vector configure instruction target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[v12,02/61] target/riscv: implementation-defined constant parameters target/riscv: support vector extension v0.7.1 --- 2020-07-01 LIU Zhiwei Superseded
[1/1] tcg/tcg-op: nonatomic_op should work with smaller memop [1/1] tcg/tcg-op: nonatomic_op should work with smaller memop --- 2020-07-01 LIU Zhiwei New
[1/2] tcg/tcg-op: Fix nonatomic_op load with MO_SIGN [1/2] tcg/tcg-op: Fix nonatomic_op load with MO_SIGN --- 2020-06-29 LIU Zhiwei New
[6/6] target/riscv: clean up fmv.w.x target/riscv: NaN-boxing for multiple precison --- 2020-06-26 LIU Zhiwei New
[4/6] target/riscv: check before allocating TCG temps target/riscv: NaN-boxing for multiple precison --- 2020-06-26 LIU Zhiwei New
[2/6] target/riscv: NaN-boxing compute, sign-injection and convert instructions. target/riscv: NaN-boxing for multiple precison --- 2020-06-26 LIU Zhiwei New
[v11,61/61] target/riscv: configure and turn on vector extension from command line target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei Superseded
[v11,60/61] target/riscv: vector compress instruction target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei Superseded
[v11,58/61] target/riscv: vector slide instructions target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei New
[v11,56/61] target/riscv: integer scalar move instruction target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei Superseded
[v11,54/61] target/riscv: vector element index instruction target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei Superseded
[v11,52/61] target/riscv: set-X-first mask bit target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei Superseded
[v11,49/61] target/riscv: vector mask-register logical instructions target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei Superseded
[v11,48/61] target/riscv: vector widening floating-point reduction instructions target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei Superseded
[v11,47/61] target/riscv: vector single-width floating-point reduction instructions target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei Superseded
[v11,45/61] target/riscv: vector single-width integer reduction instructions target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei Superseded
[v11,42/61] target/riscv: vector floating-point/integer type-convert instructions target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei Superseded
[v11,40/61] target/riscv: vector floating-point classify instructions target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei Superseded
[v11,38/61] target/riscv: vector floating-point sign-injection instructions target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei New
[v11,36/61] target/riscv: vector floating-point square-root instruction target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei New
[v11,34/61] target/riscv: vector single-width floating-point fused multiply-add instructions target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei New
[v11,32/61] target/riscv: vector single-width floating-point multiply/divide instructions target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei Superseded
[v11,29/61] target/riscv: vector narrowing fixed-point clip instructions target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei Superseded
[v11,27/61] target/riscv: vector widening saturating scaled multiply-add target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei Superseded
[v11,25/61] target/riscv: vector single-width averaging add and subtract target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei Superseded
[v11,23/61] target/riscv: vector integer merge and move instructions target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei Superseded
[v11,21/61] target/riscv: vector single-width integer multiply-add instructions target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei Superseded
[v11,19/61] target/riscv: vector integer divide instructions target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei Superseded
[v11,18/61] target/riscv: vector single-width integer multiply instructions target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei Superseded
[v11,16/61] target/riscv: vector integer comparison instructions target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei New
[v11,14/61] target/riscv: vector single-width bit shift instructions target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei Superseded
[v11,12/61] target/riscv: vector integer add-with-carry / subtract-with-borrow instructions target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei Superseded
[v11,10/61] target/riscv: vector single-width integer add and subtract target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei Superseded
[v11,08/61] target/riscv: add fault-only-first unit stride load target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei New
[v11,06/61] target/riscv: add vector stride load and store instructions target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei Superseded
[v11,05/61] target/riscv: add an internals.h header target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei Superseded
[v11,03/61] target/riscv: support vector extension csr target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei Superseded
[v11,01/61] target/riscv: add vector extension field in CPURISCVState target/riscv: support vector extension v0.7.1 --- 2020-06-23 LIU Zhiwei Superseded
[v10,61/61] target/riscv: configure and turn on vector extension from command line target/riscv: support vector extension v0.7.1 --- 2020-06-20 LIU Zhiwei Superseded
[v10,59/61] target/riscv: vector register gather instruction target/riscv: support vector extension v0.7.1 --- 2020-06-20 LIU Zhiwei Superseded
[v10,57/61] target/riscv: floating-point scalar move instructions target/riscv: support vector extension v0.7.1 --- 2020-06-20 LIU Zhiwei New
[v10,55/61] target/riscv: integer extract instruction target/riscv: support vector extension v0.7.1 --- 2020-06-20 LIU Zhiwei Superseded
[v10,53/61] target/riscv: vector iota instruction target/riscv: support vector extension v0.7.1 --- 2020-06-20 LIU Zhiwei Superseded
[v10,51/61] target/riscv: vmfirst find-first-set mask bit target/riscv: support vector extension v0.7.1 --- 2020-06-20 LIU Zhiwei Superseded
[v10,49/61] target/riscv: vector mask-register logical instructions target/riscv: support vector extension v0.7.1 --- 2020-06-20 LIU Zhiwei Superseded
[v10,47/61] target/riscv: vector single-width floating-point reduction instructions target/riscv: support vector extension v0.7.1 --- 2020-06-20 LIU Zhiwei Superseded
[v10,45/61] target/riscv: vector single-width integer reduction instructions target/riscv: support vector extension v0.7.1 --- 2020-06-20 LIU Zhiwei Superseded
[v10,43/61] target/riscv: widening floating-point/integer type-convert instructions target/riscv: support vector extension v0.7.1 --- 2020-06-20 LIU Zhiwei New
[v10,41/61] target/riscv: vector floating-point merge instructions target/riscv: support vector extension v0.7.1 --- 2020-06-20 LIU Zhiwei New
[v10,39/61] target/riscv: vector floating-point compare instructions target/riscv: support vector extension v0.7.1 --- 2020-06-20 LIU Zhiwei Superseded
[v10,37/61] target/riscv: vector floating-point min/max instructions target/riscv: support vector extension v0.7.1 --- 2020-06-20 LIU Zhiwei Superseded
[v10,35/61] target/riscv: vector widening floating-point fused multiply-add instructions target/riscv: support vector extension v0.7.1 --- 2020-06-20 LIU Zhiwei Superseded
[v10,33/61] target/riscv: vector widening floating-point multiply target/riscv: support vector extension v0.7.1 --- 2020-06-20 LIU Zhiwei Superseded
[v10,31/61] target/riscv: vector widening floating-point add/subtract instructions target/riscv: support vector extension v0.7.1 --- 2020-06-20 LIU Zhiwei Superseded
[v10,29/61] target/riscv: vector narrowing fixed-point clip instructions target/riscv: support vector extension v0.7.1 --- 2020-06-20 LIU Zhiwei Superseded
[v10,27/61] target/riscv: vector widening saturating scaled multiply-add target/riscv: support vector extension v0.7.1 --- 2020-06-20 LIU Zhiwei Superseded
[v10,25/61] target/riscv: vector single-width averaging add and subtract target/riscv: support vector extension v0.7.1 --- 2020-06-20 LIU Zhiwei Superseded
[v10,22/61] target/riscv: vector widening integer multiply-add instructions target/riscv: support vector extension v0.7.1 --- 2020-06-20 LIU Zhiwei Superseded
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