diff mbox series

[PULL,09/15] util/cacheinfo: Use uint64_t on LLP64 model to satisfy Windows ARM64

Message ID 20190507120011.18100-10-peter.maydell@linaro.org
State Accepted
Commit 8041336ef74e19ca607c1601016333c986de8f9c
Headers show
Series target-arm queue | expand

Commit Message

Peter Maydell May 7, 2019, noon UTC 
From: Cao Jiaxi <driver1998@foxmail.com>


Windows ARM64 uses LLP64 model, which breaks current assumptions.

Signed-off-by: Cao Jiaxi <driver1998@foxmail.com>

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Thomas Huth <thuth@redhat.com>

Message-id: 20190503003707.10185-1-driver1998@foxmail.com
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>

Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---
 util/cacheinfo.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

-- 
2.20.1
diff mbox series

Patch

diff --git a/util/cacheinfo.c b/util/cacheinfo.c
index 3cd080b83d1..eebe1ce9c5d 100644
--- a/util/cacheinfo.c
+++ b/util/cacheinfo.c
@@ -107,7 +107,7 @@  static void sys_cache_info(int *isize, int *dsize)
 static void arch_cache_info(int *isize, int *dsize)
 {
     if (*isize == 0 || *dsize == 0) {
-        unsigned long ctr;
+        uint64_t ctr;
 
         /* The real cache geometry is in CCSIDR_EL1/CLIDR_EL1/CSSELR_EL1,
            but (at least under Linux) these are marked protected by the