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[v2,0/3] arm-smmu: performance optimization

Message ID 1505221238-9428-1-git-send-email-thunder.leizhen@huawei.com
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Series arm-smmu: performance optimization | expand

Message

Zhen Lei Sept. 12, 2017, 1 p.m. UTC
v1 -> v2:
base on (add02cfdc9bc2 "iommu: Introduce Interface for IOMMU TLB Flushing")

Zhen Lei (3):
  iommu/arm-smmu-v3: put off the execution of TLBI* to reduce lock
    confliction
  iommu/arm-smmu-v3: add support for unmap an iova range with only one
    tlb sync
  iommu/arm-smmu: add support for unmap a memory range with only one tlb
    sync

 drivers/iommu/arm-smmu-v3.c        | 52 ++++++++++++++++++++++++++++++++++----
 drivers/iommu/arm-smmu.c           | 10 ++++++++
 drivers/iommu/io-pgtable-arm-v7s.c | 32 +++++++++++++++--------
 drivers/iommu/io-pgtable-arm.c     | 30 ++++++++++++++--------
 drivers/iommu/io-pgtable.h         |  1 +
 5 files changed, 99 insertions(+), 26 deletions(-)

-- 
2.5.0

Comments

Nate Watterson Sept. 19, 2017, 4:31 a.m. UTC | #1
Hi Leizhen,

On 9/12/2017 9:00 AM, Zhen Lei wrote:
> v1 -> v2:

> base on (add02cfdc9bc2 "iommu: Introduce Interface for IOMMU TLB Flushing")

> 

> Zhen Lei (3):

>    iommu/arm-smmu-v3: put off the execution of TLBI* to reduce lock

>      confliction

>    iommu/arm-smmu-v3: add support for unmap an iova range with only one

>      tlb sync


I tested these (2) patches on QDF2400 hardware and saw performance
improvements in line with those I reported when testing the original
series. I don't have any hardware close at hand to test the 3rd patch
in the series so that will have to come from someone else.

Tested-by: Nate Watterson <nwatters@codeaurora.org>


Thanks,
Nate

>    iommu/arm-smmu: add support for unmap a memory range with only one tlb

>      sync

> 

>   drivers/iommu/arm-smmu-v3.c        | 52 ++++++++++++++++++++++++++++++++++----

>   drivers/iommu/arm-smmu.c           | 10 ++++++++

>   drivers/iommu/io-pgtable-arm-v7s.c | 32 +++++++++++++++--------

>   drivers/iommu/io-pgtable-arm.c     | 30 ++++++++++++++--------

>   drivers/iommu/io-pgtable.h         |  1 +

>   5 files changed, 99 insertions(+), 26 deletions(-)

> 


-- 
Qualcomm Datacenter Technologies as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.
Zhen Lei Sept. 19, 2017, 6:26 a.m. UTC | #2
On 2017/9/19 12:31, Nate Watterson wrote:
> Hi Leizhen,

> 

> On 9/12/2017 9:00 AM, Zhen Lei wrote:

>> v1 -> v2:

>> base on (add02cfdc9bc2 "iommu: Introduce Interface for IOMMU TLB Flushing")

>>

>> Zhen Lei (3):

>>    iommu/arm-smmu-v3: put off the execution of TLBI* to reduce lock

>>      confliction

>>    iommu/arm-smmu-v3: add support for unmap an iova range with only one

>>      tlb sync

> 

> I tested these (2) patches on QDF2400 hardware and saw performance

> improvements in line with those I reported when testing the original

> series. I don't have any hardware close at hand to test the 3rd patch

> in the series so that will have to come from someone else.

Thanks a lot.

> 

> Tested-by: Nate Watterson <nwatters@codeaurora.org>

> 

> Thanks,

> Nate

> 

>>    iommu/arm-smmu: add support for unmap a memory range with only one tlb

>>      sync

>>

>>   drivers/iommu/arm-smmu-v3.c        | 52 ++++++++++++++++++++++++++++++++++----

>>   drivers/iommu/arm-smmu.c           | 10 ++++++++

>>   drivers/iommu/io-pgtable-arm-v7s.c | 32 +++++++++++++++--------

>>   drivers/iommu/io-pgtable-arm.c     | 30 ++++++++++++++--------

>>   drivers/iommu/io-pgtable.h         |  1 +

>>   5 files changed, 99 insertions(+), 26 deletions(-)

>>

> 


-- 
Thanks!
BestRegards