[Xen-devel,RFC,11/49] ARM: VGIC: reorder prototypes in vgic.h

Message ID 20180209143937.28866-12-andre.przywara@linaro.org
State New
Headers show
Series
  • New VGIC(-v2) implementation
Related show

Commit Message

Andre Przywara Feb. 9, 2018, 2:38 p.m.
Currently vgic.h both contains prototypes used by Xen arch code outside
of the actual VGIC (for instance vgic_vcpu_inject_irq()), and prototypes
for functions used by the VGIC internally.
Group them to later allow an easy split with one #ifdef.

Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
---
 xen/include/asm-arm/vgic.h | 73 ++++++++++++++++++++++++----------------------
 1 file changed, 38 insertions(+), 35 deletions(-)

Comments

Julien Grall Feb. 12, 2018, 11:53 a.m. | #1
Hi Andre,

On 09/02/18 14:38, Andre Przywara wrote:
>   /*
> - * Allocate a guest VIRQ
> - *  - spi == 0 => allocate a PPI. It will be the same on every vCPU
> - *  - spi == 1 => allocate an SPI
> + * In the moment vgic_num_irqs() just covers SPIs and the private IRQs,
> + * as it's mostly used for allocating the pending_irq and irq_desc array,
> + * in which LPIs don't participate.
>    */
> -extern int vgic_allocate_virq(struct domain *d, bool spi);
> +#define vgic_num_irqs(d)        ((d)->arch.vgic.nr_spis + 32)
>   
> +/*
> + * Allocate a guest VIRQ
> + *  - is_spi == 0 => allocate a PPI. It will be the same on every vCPU
> + *  - is_spi == 1 => allocate an SPI
> + */
> +extern int vgic_allocate_virq(struct domain *d, bool is_spi);
> +/* Reserve a specific guest vIRQ */
> +extern bool vgic_reserve_virq(struct domain *d, unsigned int virq);
> +extern void vgic_free_virq(struct domain *d, unsigned int virq);

newline here please.

Otherwise the split looks good:

Reviewed-by: Julien Grall <julien.grall@arm.com>

Cheers,

>   static inline int vgic_allocate_ppi(struct domain *d)
>   {
>       return vgic_allocate_virq(d, false /* ppi */);
> @@ -340,18 +340,21 @@ static inline int vgic_allocate_spi(struct domain *d)
>       return vgic_allocate_virq(d, true /* spi */);
>   }
>   
> -extern void vgic_free_virq(struct domain *d, unsigned int virq);
> +struct irq_desc *vgic_get_hw_irq_desc(struct domain *d, struct vcpu *v,
> +                                      unsigned int virq);
> +int vgic_connect_hw_irq(struct domain *d, struct vcpu *v, unsigned int virq,
> +                        struct irq_desc *desc, bool connect);
>   
> -void vgic_v2_setup_hw(paddr_t dbase, paddr_t cbase, paddr_t csize,
> -                      paddr_t vbase, uint32_t aliased_offset);
> +bool vgic_evtchn_irq_pending(struct vcpu *v);
>   
> -#ifdef CONFIG_HAS_GICV3
> -struct rdist_region;
> -void vgic_v3_setup_hw(paddr_t dbase,
> -                      unsigned int nr_rdist_regions,
> -                      const struct rdist_region *regions,
> -                      unsigned int intid_bits);
> -#endif
> +int domain_vgic_register(struct domain *d, int *mmio_count);
> +int domain_vgic_init(struct domain *d, unsigned int nr_spis);
> +void domain_vgic_free(struct domain *d);
> +int vcpu_vgic_init(struct vcpu *vcpu);
> +int vcpu_vgic_free(struct vcpu *vcpu);
> +
> +int vgic_inject_irq(struct domain *d, struct vcpu *v, unsigned int virq,
> +                    bool level);
>   
>   #endif /* __ASM_ARM_VGIC_H__ */
>   
>

Patch

diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h
index 4e1c37f091..8c39ff1402 100644
--- a/xen/include/asm-arm/vgic.h
+++ b/xen/include/asm-arm/vgic.h
@@ -279,19 +279,8 @@  enum gic_sgi_mode;
  */
 #define REG_RANK_INDEX(b, n, s) ((((n) >> s) & ((b)-1)) % 32)
 
-/*
- * In the moment vgic_num_irqs() just covers SPIs and the private IRQs,
- * as it's mostly used for allocating the pending_irq and irq_desc array,
- * in which LPIs don't participate.
- */
-#define vgic_num_irqs(d)        ((d)->arch.vgic.nr_spis + 32)
 
-extern int domain_vgic_init(struct domain *d, unsigned int nr_spis);
-extern void domain_vgic_free(struct domain *d);
-extern int vcpu_vgic_init(struct vcpu *v);
 extern struct vcpu *vgic_get_target_vcpu(struct vcpu *v, unsigned int virq);
-extern int vgic_inject_irq(struct domain *d, struct vcpu *v, unsigned int virq,
-                           bool level);
 extern void vgic_remove_irq_from_queues(struct vcpu *v, struct pending_irq *p);
 extern void gic_remove_from_lr_pending(struct vcpu *v, struct pending_irq *p);
 extern void vgic_clear_pending_irqs(struct vcpu *v);
@@ -307,29 +296,40 @@  extern void register_vgic_ops(struct domain *d, const struct vgic_ops *ops);
 int vgic_v2_init(struct domain *d, int *mmio_count);
 int vgic_v3_init(struct domain *d, int *mmio_count);
 
-bool vgic_evtchn_irq_pending(struct vcpu *v);
-struct irq_desc *vgic_get_hw_irq_desc(struct domain *d, struct vcpu *v,
-                                      unsigned int virq);
-int vgic_connect_hw_irq(struct domain *d, struct vcpu *v, unsigned int virq,
-                        struct irq_desc *desc, bool connect);
-
-extern int domain_vgic_register(struct domain *d, int *mmio_count);
-extern int vcpu_vgic_free(struct vcpu *v);
 extern bool vgic_to_sgi(struct vcpu *v, register_t sgir,
                         enum gic_sgi_mode irqmode, int virq,
                         const struct sgi_target *target);
 extern bool vgic_migrate_irq(struct vcpu *old, struct vcpu *new, unsigned int irq);
 
-/* Reserve a specific guest vIRQ */
-extern bool vgic_reserve_virq(struct domain *d, unsigned int virq);
+void vgic_v2_setup_hw(paddr_t dbase, paddr_t cbase, paddr_t csize,
+                      paddr_t vbase, uint32_t aliased_offset);
+
+#ifdef CONFIG_HAS_GICV3
+struct rdist_region;
+void vgic_v3_setup_hw(paddr_t dbase,
+                      unsigned int nr_rdist_regions,
+                      const struct rdist_region *regions,
+                      unsigned int intid_bits);
+#endif
+
+/*** Common VGIC functions used by Xen arch code ****/
 
 /*
- * Allocate a guest VIRQ
- *  - spi == 0 => allocate a PPI. It will be the same on every vCPU
- *  - spi == 1 => allocate an SPI
+ * In the moment vgic_num_irqs() just covers SPIs and the private IRQs,
+ * as it's mostly used for allocating the pending_irq and irq_desc array,
+ * in which LPIs don't participate.
  */
-extern int vgic_allocate_virq(struct domain *d, bool spi);
+#define vgic_num_irqs(d)        ((d)->arch.vgic.nr_spis + 32)
 
+/*
+ * Allocate a guest VIRQ
+ *  - is_spi == 0 => allocate a PPI. It will be the same on every vCPU
+ *  - is_spi == 1 => allocate an SPI
+ */
+extern int vgic_allocate_virq(struct domain *d, bool is_spi);
+/* Reserve a specific guest vIRQ */
+extern bool vgic_reserve_virq(struct domain *d, unsigned int virq);
+extern void vgic_free_virq(struct domain *d, unsigned int virq);
 static inline int vgic_allocate_ppi(struct domain *d)
 {
     return vgic_allocate_virq(d, false /* ppi */);
@@ -340,18 +340,21 @@  static inline int vgic_allocate_spi(struct domain *d)
     return vgic_allocate_virq(d, true /* spi */);
 }
 
-extern void vgic_free_virq(struct domain *d, unsigned int virq);
+struct irq_desc *vgic_get_hw_irq_desc(struct domain *d, struct vcpu *v,
+                                      unsigned int virq);
+int vgic_connect_hw_irq(struct domain *d, struct vcpu *v, unsigned int virq,
+                        struct irq_desc *desc, bool connect);
 
-void vgic_v2_setup_hw(paddr_t dbase, paddr_t cbase, paddr_t csize,
-                      paddr_t vbase, uint32_t aliased_offset);
+bool vgic_evtchn_irq_pending(struct vcpu *v);
 
-#ifdef CONFIG_HAS_GICV3
-struct rdist_region;
-void vgic_v3_setup_hw(paddr_t dbase,
-                      unsigned int nr_rdist_regions,
-                      const struct rdist_region *regions,
-                      unsigned int intid_bits);
-#endif
+int domain_vgic_register(struct domain *d, int *mmio_count);
+int domain_vgic_init(struct domain *d, unsigned int nr_spis);
+void domain_vgic_free(struct domain *d);
+int vcpu_vgic_init(struct vcpu *vcpu);
+int vcpu_vgic_free(struct vcpu *vcpu);
+
+int vgic_inject_irq(struct domain *d, struct vcpu *v, unsigned int virq,
+                    bool level);
 
 #endif /* __ASM_ARM_VGIC_H__ */