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Patches credited to peter.maydell@linaro.org
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Patch
Series
S/W/F
Date
Submitter
Delegate
State
[PULL,09/36] hw/arm: Add watchdog timer to Allwinner H40 and Bananapi board
[PULL,01/36] target/xtensa: fix OOB TLB entry access
-
-
-
2024-01-26
Peter Maydell
Not Applicable
[PULL,08/36] hw/arm: Add AHCI/SATA controller to Allwinner R40 and Bananapi board
[PULL,01/36] target/xtensa: fix OOB TLB entry access
-
-
-
2024-01-26
Peter Maydell
Not Applicable
[PULL,07/36] hw/arm: Add EHCI/OHCI controllers to Allwinner R40 and Bananapi board
[PULL,01/36] target/xtensa: fix OOB TLB entry access
-
-
-
2024-01-26
Peter Maydell
Not Applicable
[PULL,06/36] hw/arm/nseries: Unconditionally map the TUSB6010 USB Host controller
[PULL,01/36] target/xtensa: fix OOB TLB entry access
-
-
-
2024-01-26
Peter Maydell
Accepted
[PULL,05/36] hw/arm/allwinner-a10: Unconditionally map the USB Host controllers
[PULL,01/36] target/xtensa: fix OOB TLB entry access
-
-
-
2024-01-26
Peter Maydell
Not Applicable
[PULL,04/36] hw/arm/musicpal: Convert to qemu_add_kbd_event_handler()
[PULL,01/36] target/xtensa: fix OOB TLB entry access
-
-
-
2024-01-26
Peter Maydell
Not Applicable
[PULL,03/36] hw/arm/virt.c: Remove newline from error_report() string
[PULL,01/36] target/xtensa: fix OOB TLB entry access
-
-
-
2024-01-26
Peter Maydell
Accepted
[PULL,02/36] target/arm: Fix VNCR fault detection logic
[PULL,01/36] target/xtensa: fix OOB TLB entry access
-
-
-
2024-01-26
Peter Maydell
Accepted
[PULL,01/36] target/xtensa: fix OOB TLB entry access
[PULL,01/36] target/xtensa: fix OOB TLB entry access
-
-
-
2024-01-26
Peter Maydell
Accepted
[PULL,00/36] target-arm queue
-
-
-
2024-01-26
Peter Maydell
Not Applicable
[2/2] meson: Enable -Wvla
Enable -Wvla, forbidding use of variable length arrays
-
-
-
2024-01-25
Peter Maydell
Accepted
[1/2] tests/qtest/xlnx-versal-trng-test.c: Drop use of variable length array
Enable -Wvla, forbidding use of variable length arrays
-
-
-
2024-01-25
Peter Maydell
Superseded
[10/10] misc: Clean up includes
Clean up includes
-
-
-
2024-01-25
Peter Maydell
Accepted
[09/10] riscv: Clean up includes
Clean up includes
-
-
-
2024-01-25
Peter Maydell
Accepted
[08/10] cxl: Clean up includes
Clean up includes
-
-
-
2024-01-25
Peter Maydell
Accepted
[07/10] include: Clean up includes
Clean up includes
-
-
-
2024-01-25
Peter Maydell
Accepted
[06/10] m68k: Clean up includes
Clean up includes
-
-
-
2024-01-25
Peter Maydell
Accepted
[05/10] acpi: Clean up includes
Clean up includes
-
-
-
2024-01-25
Peter Maydell
Accepted
[04/10] aspeed: Clean up includes
Clean up includes
-
-
-
2024-01-25
Peter Maydell
Accepted
[03/10] disas/riscv: Clean up includes
Clean up includes
-
-
-
2024-01-25
Peter Maydell
Accepted
[02/10] hyperv: Clean up includes
Clean up includes
-
-
-
2024-01-25
Peter Maydell
Accepted
[01/10] scripts/clean-includes: Update exclude list
Clean up includes
-
-
-
2024-01-25
Peter Maydell
Superseded
target/arm: Add ID_AA64ZFR0_EL1.B16B16 to the exposed-to-userspace set
target/arm: Add ID_AA64ZFR0_EL1.B16B16 to the exposed-to-userspace set
-
-
-
2024-01-25
Peter Maydell
Superseded
target/arm: Fix incorrect aa64_tidcp1 feature check
target/arm: Fix incorrect aa64_tidcp1 feature check
-
-
-
2024-01-23
Peter Maydell
Superseded
target/arm: Fix A64 scalar SQSHRN and SQRSHRN
target/arm: Fix A64 scalar SQSHRN and SQRSHRN
-
-
-
2024-01-23
Peter Maydell
Superseded
bswap.h: Fix const_le64() macro
bswap.h: Fix const_le64() macro
-
-
-
2024-01-22
Peter Maydell
Superseded
[2/2] qemu-options.hx: Improve -serial option documentation
system: Fix handling of '-serial none -serial something'
-
-
-
2024-01-22
Peter Maydell
Superseded
[1/2] system/vl.c: Fix handling of '-serial none -serial something'
system: Fix handling of '-serial none -serial something'
-
-
-
2024-01-22
Peter Maydell
Superseded
[v2,3/3] tests/qtest/bios-tables-tests: Update virt golden reference
virt: wire up NS EL2 virtual timer IRQ
-
-
-
2024-01-22
Peter Maydell
Superseded
[v2,2/3] hw/arm/virt: Wire up non-secure EL2 virtual timer IRQ
virt: wire up NS EL2 virtual timer IRQ
-
-
-
2024-01-22
Peter Maydell
Superseded
[v2,1/3] tests/qtest/bios-tables-test: Allow changes to virt GTDT
virt: wire up NS EL2 virtual timer IRQ
-
-
-
2024-01-22
Peter Maydell
Superseded
[5/5] hw/core: Remove transitional infrastructure from BusClass
buses: switch to 3-phase-reset
-
-
-
2024-01-19
Peter Maydell
Superseded
[4/5] hw/s390x/css-bridge: switch virtual-css bus to 3-phase-reset
buses: switch to 3-phase-reset
-
-
-
2024-01-19
Peter Maydell
Superseded
[3/5] adb: Switch bus reset to 3-phase-reset
buses: switch to 3-phase-reset
-
-
-
2024-01-19
Peter Maydell
Superseded
[2/5] vmbus: Switch bus reset to 3-phase-reset
buses: switch to 3-phase-reset
-
-
-
2024-01-19
Peter Maydell
Superseded
[1/5] pci: Switch bus reset to 3-phase-reset
buses: switch to 3-phase-reset
-
-
-
2024-01-19
Peter Maydell
Superseded
hw/arm/virt.c: Remove newline from error_report() string
hw/arm/virt.c: Remove newline from error_report() string
-
-
-
2024-01-18
Peter Maydell
Superseded
[PULL,v2,00/12] target-arm queue
-
-
-
2024-01-18
Peter Maydell
Not Applicable
target/arm: Fix VNCR fault detection logic
target/arm: Fix VNCR fault detection logic
-
-
-
2024-01-16
Peter Maydell
Superseded
[PULL,21/21] load_elf: fix iterator's type for elf file processing
[PULL,01/21] docs/devel/docs: Document .hx file syntax
-
-
-
2024-01-16
Peter Maydell
Accepted
[PULL,20/21] hw/arm/virt: Consolidate valid CPU types
[PULL,01/21] docs/devel/docs: Document .hx file syntax
-
-
-
2024-01-16
Peter Maydell
Accepted
[PULL,19/21] hw/timer: fix systick trace message
[PULL,01/21] docs/devel/docs: Document .hx file syntax
-
-
-
2024-01-16
Peter Maydell
Accepted
[PULL,18/21] tests/qtest: Adding PCS Module test to GMAC Qtest
[PULL,01/21] docs/devel/docs: Document .hx file syntax
-
-
-
2024-01-16
Peter Maydell
Superseded
[PULL,17/21] hw/net: GMAC Tx Implementation
[PULL,01/21] docs/devel/docs: Document .hx file syntax
-
-
-
2024-01-16
Peter Maydell
Superseded
[PULL,16/21] hw/net: GMAC Rx Implementation
[PULL,01/21] docs/devel/docs: Document .hx file syntax
-
-
-
2024-01-16
Peter Maydell
Superseded
[PULL,15/21] tests/qtest: Creating qtest for GMAC Module
[PULL,01/21] docs/devel/docs: Document .hx file syntax
-
-
-
2024-01-16
Peter Maydell
Superseded
[PULL,14/21] hw/arm: Add GMAC devices to NPCM7XX SoC
[PULL,01/21] docs/devel/docs: Document .hx file syntax
-
-
-
2024-01-16
Peter Maydell
Superseded
[PULL,13/21] hw/net: Add NPCMXXX GMAC device
[PULL,01/21] docs/devel/docs: Document .hx file syntax
-
-
-
2024-01-16
Peter Maydell
Superseded
[PULL,12/21] hw/misc: Add qtest for NPCM7xx PCI Mailbox
[PULL,01/21] docs/devel/docs: Document .hx file syntax
-
-
-
2024-01-16
Peter Maydell
Not Applicable
[PULL,11/21] hw/arm: Add PCI mailbox module to Nuvoton SoC
[PULL,01/21] docs/devel/docs: Document .hx file syntax
-
-
-
2024-01-16
Peter Maydell
Not Applicable
[PULL,10/21] hw/misc: Add Nuvoton's PCI Mailbox Module
[PULL,01/21] docs/devel/docs: Document .hx file syntax
-
-
-
2024-01-16
Peter Maydell
Not Applicable
[PULL,09/21] tests/qtest: Add STM32L4x5 SYSCFG QTest testcase
[PULL,01/21] docs/devel/docs: Document .hx file syntax
-
-
-
2024-01-16
Peter Maydell
Accepted
[PULL,08/21] hw/arm: Connect STM32L4x5 SYSCFG to STM32L4x5 SoC
[PULL,01/21] docs/devel/docs: Document .hx file syntax
-
-
-
2024-01-16
Peter Maydell
Not Applicable
[PULL,07/21] hw/misc: Implement STM32L4x5 SYSCFG
[PULL,01/21] docs/devel/docs: Document .hx file syntax
-
-
-
2024-01-16
Peter Maydell
Not Applicable
[PULL,06/21] tests/qtest: Add STM32L4x5 EXTI QTest testcase
[PULL,01/21] docs/devel/docs: Document .hx file syntax
-
-
-
2024-01-16
Peter Maydell
Accepted
[PULL,05/21] hw/arm: Connect STM32L4x5 EXTI to STM32L4x5 SoC
[PULL,01/21] docs/devel/docs: Document .hx file syntax
-
-
-
2024-01-16
Peter Maydell
Not Applicable
[PULL,04/21] hw/misc: Implement STM32L4x5 EXTI
[PULL,01/21] docs/devel/docs: Document .hx file syntax
-
-
-
2024-01-16
Peter Maydell
Not Applicable
[PULL,03/21] docs/system/arm/virt.rst: Improve 'highmem' option docs
[PULL,01/21] docs/devel/docs: Document .hx file syntax
-
-
-
2024-01-16
Peter Maydell
Accepted
[PULL,02/21] target/arm: arm_pamax() no longer needs to do feature propagation
[PULL,01/21] docs/devel/docs: Document .hx file syntax
-
-
-
2024-01-16
Peter Maydell
Accepted
[PULL,01/21] docs/devel/docs: Document .hx file syntax
[PULL,01/21] docs/devel/docs: Document .hx file syntax
-
-
-
2024-01-16
Peter Maydell
Accepted
[PULL,00/21] target-arm queue
-
-
-
2024-01-16
Peter Maydell
Not Applicable
hw/pci-host/raven.c: Mark raven_io_ops as implementing unaligned accesses
hw/pci-host/raven.c: Mark raven_io_ops as implementing unaligned accesses
-
-
-
2024-01-12
Peter Maydell
Superseded
.gitlab-ci.d/buildtest.yml: Work around htags bug when environment is large
.gitlab-ci.d/buildtest.yml: Work around htags bug when environment is large
-
-
-
2024-01-11
Peter Maydell
Superseded
[PULL,41/41] target/arm: Add FEAT_NV2 to max, neoverse-n2, neoverse-v1 CPUs
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,40/41] target/arm: Enhance CPU_LOG_INT to show SPSR on AArch64 exception-entry
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,39/41] target/arm: Report HCR_EL2.{NV,NV1,NV2} in cpu dumps
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,38/41] hw/intc/arm_gicv3_cpuif: Mark up VNCR offsets for GIC CPU registers
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,37/41] target/arm: Mark up VNCR offsets (offsets >= 0x200, except GIC)
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,36/41] target/arm: Mark up VNCR offsets (offsets 0x168..0x1f8)
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,35/41] target/arm: Mark up VNCR offsets (offsets 0x100..0x160)
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,34/41] target/arm: Mark up VNCR offsets (offsets 0x0..0xff)
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,33/41] target/arm: Report VNCR_EL2 based faults correctly
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,32/41] target/arm: Implement FEAT_NV2 redirection of sysregs to RAM
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Not Applicable
[PULL,31/41] target/arm: Handle FEAT_NV2 redirection of SPSR_EL2, ELR_EL2, ESR_EL2, FAR_EL2
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Not Applicable
[PULL,30/41] target/arm: Handle FEAT_NV2 changes to when SPSR_EL1.M reports EL2
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,29/41] target/arm: Implement VNCR_EL2 register
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,28/41] target/arm: Handle HCR_EL2 accesses for FEAT_NV2 bits
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,27/41] target/arm: Add FEAT_NV to max, neoverse-n2, neoverse-v1 CPUs
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,26/41] target/arm: Handle FEAT_NV page table attribute changes
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,25/41] target/arm: Treat LDTR* and STTR* as LDR/STR when NV, NV1 is 1, 1
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,24/41] target/arm: Don't honour PSTATE.PAN when HCR_EL2.{NV, NV1} == {1, 1}
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Not Applicable
[PULL,23/41] target/arm: Always use arm_pan_enabled() when checking if PAN is enabled
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,22/41] target/arm: Trap registers when HCR_EL2.{NV, NV1} == {1, 1}
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,21/41] target/arm: Set SPSR_EL1.M correctly when nested virt is enabled
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,20/41] target/arm: Make NV reads of CurrentEL return EL2
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,19/41] target/arm: Trap sysreg accesses for FEAT_NV
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Not Applicable
[PULL,18/41] target/arm: Move FPU/SVE/SME access checks up above ARM_CP_SPECIAL_MASK check
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,17/41] target/arm: Make EL2 cpreg accessfns safe for FEAT_NV EL1 accesses
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,16/41] target/arm: *_EL12 registers should UNDEF when HCR_EL2.E2H is 0
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,15/41] target/arm: Record correct opcode fields in cpreg for E2H aliases
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,14/41] target/arm: Allow use of upper 32 bits of TBFLAG_A64
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,13/41] target/arm: Always honour HCR_EL2.TSC when HCR_EL2.NV is set
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,12/41] target/arm: Enable trapping of ERET for FEAT_NV
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Not Applicable
[PULL,11/41] target/arm: Implement HCR_EL2.AT handling
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,10/41] target/arm: Handle HCR_EL2 accesses for bits introduced with FEAT_NV
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,09/41] hw/intc/arm_gicv3_cpuif: handle LPIs in in the list registers
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,08/41] target/arm: Set CTR_EL0.{IDC,DIC} for the 'max' CPU
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,07/41] hw/arm: Add missing QOM parent for v7-M SoCs
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,06/41] hw/arm/socs: configure priority bits for existing SOCs
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Accepted
[PULL,05/41] hw/arm/armv7m: alias the NVIC "num-prio-bits" property
[PULL,01/41] hw/arm: add cache controller for Freescale i.MX6
-
-
-
2024-01-11
Peter Maydell
Not Applicable
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