mbox series

[00/36] target/arm: Convert Neon to decodetree (part 1)

Message ID 20200430181003.21682-1-peter.maydell@linaro.org
Headers show
Series target/arm: Convert Neon to decodetree (part 1) | expand

Message

Peter Maydell April 30, 2020, 6:09 p.m. UTC
This patchseries starts in on the job of converting the Arm
Neon decoder to decodetree.

Neon insns come in three major parts:
 * the 'v8.0-and-later' extensions
 * the 'loads and stores' group
 * the 'data processing' group

This patchset converts all of the v8.0-and-later extensions
and the loads-and-stores, plus the "3-registers-same" subgroup
of the data-processing insns.

I'm working on the rest of the dp insns, but this seems like
a pretty large chunk of conversion patches to start with.

thanks
-- PMM

Peter Maydell (36):
  target/arm/translate-vfp.inc.c: Remove duplicate simd_r32 check
  target/arm: Don't allow Thumb Neon insns without FEATURE_NEON
  target/arm: Add stubs for AArch32 Neon decodetree
  target/arm: Convert VCMLA (vector) to decodetree
  target/arm: Convert VCADD (vector) to decodetree
  target/arm: Convert V[US]DOT (vector) to decodetree
  target/arm: Convert VFM[AS]L (vector) to decodetree
  target/arm: Convert VCMLA (scalar) to decodetree
  target/arm: Convert V[US]DOT (scalar) to decodetree
  target/arm: Convert VFM[AS]L (scalar) to decodetree
  target/arm: Convert Neon load/store multiple structures to decodetree
  target/arm: Convert Neon 'load single structure to all lanes' to
    decodetree
  target/arm: Convert Neon 'load/store single structure' to decodetree
  target/arm: Convert Neon 3-reg-same VADD/VSUB to decodetree
  target/arm: Convert Neon 3-reg-same logic ops to decodetree
  target/arm: Convert Neon 3-reg-same VMAX/VMIN to decodetree
  target/arm: Convert Neon 3-reg-same comparisons to decodetree
  target/arm: Convert Neon 3-reg-same VQADD/VQSUB to decodetree
  target/arm: Convert Neon 3-reg-same VMUL, VMLA, VMLS, VSHL to
    decodetree
  target/arm: Convert Neon 3-reg-same VQRDMLAH/VQRDMLSH to decodetree
  target/arm: Convert Neon 3-reg-same SHA to decodetree
  target/arm: Move gen_ function typedefs to translate.h
  target/arm: Convert Neon 64-bit element 3-reg-same insns
  target/arm: Convert Neon VHADD 3-reg-same insns
  target/arm: Convert Neon VRHADD, VHSUB, VABD 3-reg-same insns to
    decodetree
  target/arm: Convert Neon VQSHL, VRSHL, VQRSHL 3-reg-same insns to
    decodetree
  target/arm: Convert Neon VABA 3-reg-same to decodetree
  target/arm: Convert Neon VPMAX/VPMIN 3-reg-same insns to decodetree
  target/arm: Convert Neon VPADD 3-reg-same insns to decodetree
  target/arm: Convert Neon VQDMULH/VQRDMULH 3-reg-same to decodetree
  target/arm: Convert Neon VADD, VSUB, VABD 3-reg-same insns to
    decodetree
  target/arm: Convert Neon VPMIN/VPMAX/VPADD float 3-reg-same insns to
    decodetree
  target/arm: Convert Neon fp VMUL, VMLA, VMLS 3-reg-same insns to
    decodetree
  target/arm: Convert Neon 3-reg-same compare insns to decodetree
  target/arm: Convert Neon fp VMAX/VMIN/VMAXNM/VMINNM/VRECPS/VRSQRTS to
    decodetree
  target/arm: Convert NEON VFMA, VFMS 3-reg-same insns to decodetree

 target/arm/Makefile.objs        |   18 +
 target/arm/translate-a64.h      |    9 -
 target/arm/translate.h          |   26 +
 target/arm/translate-a64.c      |   17 -
 target/arm/translate-neon.inc.c | 1577 +++++++++++++++++++++++++++++++
 target/arm/translate-vfp.inc.c  |    6 -
 target/arm/translate.c          | 1200 +----------------------
 target/arm/neon-dp.decode       |  186 ++++
 target/arm/neon-ls.decode       |   52 +
 target/arm/neon-shared.decode   |   66 ++
 10 files changed, 1967 insertions(+), 1190 deletions(-)
 create mode 100644 target/arm/translate-neon.inc.c
 create mode 100644 target/arm/neon-dp.decode
 create mode 100644 target/arm/neon-ls.decode
 create mode 100644 target/arm/neon-shared.decode

-- 
2.20.1

Comments

no-reply@patchew.org May 1, 2020, 7:32 a.m. UTC | #1
Patchew URL: https://patchew.org/QEMU/20200430181003.21682-1-peter.maydell@linaro.org/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: 20200430181003.21682-1-peter.maydell@linaro.org
Subject: [PATCH 00/36] target/arm: Convert Neon to decodetree (part 1)
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
Switched to a new branch 'test'
dda62df target/arm: Convert NEON VFMA, VFMS 3-reg-same insns to decodetree
9920691 target/arm: Convert Neon fp VMAX/VMIN/VMAXNM/VMINNM/VRECPS/VRSQRTS to decodetree
c81e71a target/arm: Convert Neon 3-reg-same compare insns to decodetree
e02542d target/arm: Convert Neon fp VMUL, VMLA, VMLS 3-reg-same insns to decodetree
f7c2ba7 target/arm: Convert Neon VPMIN/VPMAX/VPADD float 3-reg-same insns to decodetree
f09c375 target/arm: Convert Neon VADD, VSUB, VABD 3-reg-same insns to decodetree
c80424b target/arm: Convert Neon VQDMULH/VQRDMULH 3-reg-same to decodetree
b5595cc target/arm: Convert Neon VPADD 3-reg-same insns to decodetree
e8df4c7 target/arm: Convert Neon VPMAX/VPMIN 3-reg-same insns to decodetree
ca8faad target/arm: Convert Neon VABA 3-reg-same to decodetree
6672323 target/arm: Convert Neon VQSHL, VRSHL, VQRSHL 3-reg-same insns to decodetree
3337f5d target/arm: Convert Neon VRHADD, VHSUB, VABD 3-reg-same insns to decodetree
e28906c target/arm: Convert Neon VHADD 3-reg-same insns
c0f2111 target/arm: Convert Neon 64-bit element 3-reg-same insns
e07354a target/arm: Move gen_ function typedefs to translate.h
a9c75a1 target/arm: Convert Neon 3-reg-same SHA to decodetree
d327f96 target/arm: Convert Neon 3-reg-same VQRDMLAH/VQRDMLSH to decodetree
ff01a94 target/arm: Convert Neon 3-reg-same VMUL, VMLA, VMLS, VSHL to decodetree
40471d2 target/arm: Convert Neon 3-reg-same VQADD/VQSUB to decodetree
e040a02 target/arm: Convert Neon 3-reg-same comparisons to decodetree
7bc446d target/arm: Convert Neon 3-reg-same VMAX/VMIN to decodetree
a27e8ba target/arm: Convert Neon 3-reg-same logic ops to decodetree
3a38072 target/arm: Convert Neon 3-reg-same VADD/VSUB to decodetree
96ba901 target/arm: Convert Neon 'load/store single structure' to decodetree
aaa004f target/arm: Convert Neon 'load single structure to all lanes' to decodetree
29e5dea target/arm: Convert Neon load/store multiple structures to decodetree
0a891d9 target/arm: Convert VFM[AS]L (scalar) to decodetree
bfd4b39 target/arm: Convert V[US]DOT (scalar) to decodetree
d4e50c7 target/arm: Convert VCMLA (scalar) to decodetree
66295d9 target/arm: Convert VFM[AS]L (vector) to decodetree
2139cca target/arm: Convert V[US]DOT (vector) to decodetree
8c99e49 target/arm: Convert VCADD (vector) to decodetree
1877996 target/arm: Convert VCMLA (vector) to decodetree
7cf4ee8 target/arm: Add stubs for AArch32 Neon decodetree
bc4a94c target/arm: Don't allow Thumb Neon insns without FEATURE_NEON
38340b0 target/arm/translate-vfp.inc.c: Remove duplicate simd_r32 check

=== OUTPUT BEGIN ===
1/36 Checking commit 38340b07257e (target/arm/translate-vfp.inc.c: Remove duplicate simd_r32 check)
2/36 Checking commit bc4a94c2f447 (target/arm: Don't allow Thumb Neon insns without FEATURE_NEON)
3/36 Checking commit 7cf4ee82da7a (target/arm: Add stubs for AArch32 Neon decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#67: 
new file mode 100644

total: 0 errors, 1 warnings, 208 lines checked

Patch 3/36 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
4/36 Checking commit 1877996e0e6a (target/arm: Convert VCMLA (vector) to decodetree)
5/36 Checking commit 8c99e490843c (target/arm: Convert VCADD (vector) to decodetree)
6/36 Checking commit 2139ccaa801e (target/arm: Convert V[US]DOT (vector) to decodetree)
7/36 Checking commit 66295d9f8f44 (target/arm: Convert VFM[AS]L (vector) to decodetree)
8/36 Checking commit d4e50c793916 (target/arm: Convert VCMLA (scalar) to decodetree)
9/36 Checking commit bfd4b39ba7d7 (target/arm: Convert V[US]DOT (scalar) to decodetree)
10/36 Checking commit 0a891d9b9d00 (target/arm: Convert VFM[AS]L (scalar) to decodetree)
11/36 Checking commit 29e5dea9adba (target/arm: Convert Neon load/store multiple structures to decodetree)
12/36 Checking commit aaa004fcacb2 (target/arm: Convert Neon 'load single structure to all lanes' to decodetree)
13/36 Checking commit 96ba9016e79b (target/arm: Convert Neon 'load/store single structure' to decodetree)
14/36 Checking commit 3a38072d19d7 (target/arm: Convert Neon 3-reg-same VADD/VSUB to decodetree)
15/36 Checking commit a27e8bab0827 (target/arm: Convert Neon 3-reg-same logic ops to decodetree)
16/36 Checking commit 7bc446da4a45 (target/arm: Convert Neon 3-reg-same VMAX/VMIN to decodetree)
17/36 Checking commit e040a02db745 (target/arm: Convert Neon 3-reg-same comparisons to decodetree)
18/36 Checking commit 40471d203e61 (target/arm: Convert Neon 3-reg-same VQADD/VQSUB to decodetree)
19/36 Checking commit ff01a94e5d20 (target/arm: Convert Neon 3-reg-same VMUL, VMLA, VMLS, VSHL to decodetree)
WARNING: Block comments use a leading /* on a separate line
#88: FILE: target/arm/translate-neon.inc.c:707:
+        /* Note the operation is vshl vd,vm,vn */                       \

total: 0 errors, 1 warnings, 111 lines checked

Patch 19/36 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
20/36 Checking commit d327f96131a7 (target/arm: Convert Neon 3-reg-same VQRDMLAH/VQRDMLSH to decodetree)
21/36 Checking commit a9c75a1d4182 (target/arm: Convert Neon 3-reg-same SHA to decodetree)
22/36 Checking commit e07354aca256 (target/arm: Move gen_ function typedefs to translate.h)
23/36 Checking commit c0f2111a7739 (target/arm: Convert Neon 64-bit element 3-reg-same insns)
24/36 Checking commit e28906c17abf (target/arm: Convert Neon VHADD 3-reg-same insns)
25/36 Checking commit 3337f5dfa7d6 (target/arm: Convert Neon VRHADD, VHSUB, VABD 3-reg-same insns to decodetree)
26/36 Checking commit 6672323224ab (target/arm: Convert Neon VQSHL, VRSHL, VQRSHL 3-reg-same insns to decodetree)
ERROR: space required after that ',' (ctx:VxV)
#133: FILE: target/arm/translate-neon.inc.c:1105:
+DO_3SAME_QS32(VQSHL_S,qshl_s)
                      ^

ERROR: space required after that ',' (ctx:VxV)
#134: FILE: target/arm/translate-neon.inc.c:1106:
+DO_3SAME_QS32(VQSHL_U,qshl_u)
                      ^

ERROR: space required after that ',' (ctx:VxV)
#135: FILE: target/arm/translate-neon.inc.c:1107:
+DO_3SAME_QS32(VQRSHL_S,qrshl_s)
                       ^

ERROR: space required after that ',' (ctx:VxV)
#136: FILE: target/arm/translate-neon.inc.c:1108:
+DO_3SAME_QS32(VQRSHL_U,qrshl_u)
                       ^

WARNING: Block comments use a leading /* on a separate line
#150: FILE: target/arm/translate-neon.inc.c:1122:
+        /* Shift operand order is reversed */                           \

total: 4 errors, 1 warnings, 173 lines checked

Patch 26/36 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

27/36 Checking commit ca8faade49db (target/arm: Convert Neon VABA 3-reg-same to decodetree)
28/36 Checking commit e8df4c7e9300 (target/arm: Convert Neon VPMAX/VPMIN 3-reg-same insns to decodetree)
29/36 Checking commit b5595ccef501 (target/arm: Convert Neon VPADD 3-reg-same insns to decodetree)
30/36 Checking commit c80424b4f834 (target/arm: Convert Neon VQDMULH/VQRDMULH 3-reg-same to decodetree)
31/36 Checking commit f09c375fa01f (target/arm: Convert Neon VADD, VSUB, VABD 3-reg-same insns to decodetree)
ERROR: space required after that ',' (ctx:VxV)
#84: FILE: target/arm/translate-neon.inc.c:1365:
+#define DO_3S_FP(INSN,FUNC)                                         \
                      ^

WARNING: Block comments use a leading /* on a separate line
#88: FILE: target/arm/translate-neon.inc.c:1369:
+            /* TODO fp16 support */                                 \

total: 1 errors, 1 warnings, 99 lines checked

Patch 31/36 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

32/36 Checking commit f7c2ba79ec7a (target/arm: Convert Neon VPMIN/VPMAX/VPADD float 3-reg-same insns to decodetree)
ERROR: space required after that ',' (ctx:VxV)
#94: FILE: target/arm/translate-neon.inc.c:1428:
+#define DO_3S_FP_PAIR(INSN,FUNC)                                    \
                           ^

WARNING: Block comments use a leading /* on a separate line
#98: FILE: target/arm/translate-neon.inc.c:1432:
+            /* TODO fp16 support */                                 \

ERROR: suspect code indent for conditional statements (8, 8)
#156: FILE: target/arm/translate.c:4828:
         for (pass = 0; pass < (q ? 4 : 2); pass++) {
[...]
+        /* Elementwise.  */

total: 2 errors, 1 warnings, 181 lines checked

Patch 32/36 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

33/36 Checking commit e02542d0d861 (target/arm: Convert Neon fp VMUL, VMLA, VMLS 3-reg-same insns to decodetree)
ERROR: space required after that ',' (ctx:VxV)
#90: FILE: target/arm/translate-neon.inc.c:1378:
+#define DO_3S_FP(INSN,FUNC,READS_VD)                                \
                      ^

ERROR: space required after that ',' (ctx:VxV)
#90: FILE: target/arm/translate-neon.inc.c:1378:
+#define DO_3S_FP(INSN,FUNC,READS_VD)                                \
                           ^

total: 2 errors, 0 warnings, 114 lines checked

Patch 33/36 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

34/36 Checking commit c81e71ad337e (target/arm: Convert Neon 3-reg-same compare insns to decodetree)
35/36 Checking commit 992069157a4b (target/arm: Convert Neon fp VMAX/VMIN/VMAXNM/VMINNM/VRECPS/VRSQRTS to decodetree)
36/36 Checking commit dda62df05bcf (target/arm: Convert NEON VFMA, VFMS 3-reg-same insns to decodetree)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20200430181003.21682-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Peter Maydell May 4, 2020, 12:04 p.m. UTC | #2
On Thu, 30 Apr 2020 at 19:10, Peter Maydell <peter.maydell@linaro.org> wrote:
>

> This patchseries starts in on the job of converting the Arm

> Neon decoder to decodetree.

>

> Neon insns come in three major parts:

>  * the 'v8.0-and-later' extensions

>  * the 'loads and stores' group

>  * the 'data processing' group

>

> This patchset converts all of the v8.0-and-later extensions

> and the loads-and-stores, plus the "3-registers-same" subgroup

> of the data-processing insns.

>

> I'm working on the rest of the dp insns, but this seems like

> a pretty large chunk of conversion patches to start with.


I'm going to apply patches 1-19 and 22 (that's up to
"3-reg-same VMUL, VMLA, VMLS, VSHL", plus the "move gen function
typedefs" patch) to target-arm.next as they've been reviewed.
That will leave the 3-reg-same in a partially converted state
but it is not too confusingly so (or at least not much more
so than having the rest of the neon-dp group unconverted) and
I think that it will be easier to deal with this series and
the rest of the conversion if we get the completed parts into
the tree sooner rather than later.

thanks
-- PMM