diff mbox series

[25/26] tcg: Remove CPUClass::handle_mmu_fault

Message ID 20190403034358.21999-26-richard.henderson@linaro.org
State Superseded
Headers show
Series tcg: Add CPUClass::tlb_fill | expand

Commit Message

Richard Henderson April 3, 2019, 3:43 a.m. UTC
This hook is now completely replaced by tlb_fill.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 include/qom/cpu.h     |  3 ---
 accel/tcg/user-exec.c | 13 +++----------
 2 files changed, 3 insertions(+), 13 deletions(-)

-- 
2.17.1

Comments

Peter Maydell April 29, 2019, 5:29 p.m. UTC | #1
On Wed, 3 Apr 2019 at 05:03, Richard Henderson
<richard.henderson@linaro.org> wrote:
>

> This hook is now completely replaced by tlb_fill.

>

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Reviewed-by: Peter Maydell <peter.maydell@linaro.org>


thanks
-- PMM
Philippe Mathieu-Daudé May 8, 2019, 6:03 a.m. UTC | #2
On 4/3/19 5:43 AM, Richard Henderson wrote:
> This hook is now completely replaced by tlb_fill.

> 

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>


> ---

>  include/qom/cpu.h     |  3 ---

>  accel/tcg/user-exec.c | 13 +++----------

>  2 files changed, 3 insertions(+), 13 deletions(-)

> 

> diff --git a/include/qom/cpu.h b/include/qom/cpu.h

> index 7e96a0aed3..8afcf0c427 100644

> --- a/include/qom/cpu.h

> +++ b/include/qom/cpu.h

> @@ -118,7 +118,6 @@ struct TranslationBlock;

>   *       This always includes at least the program counter; some targets

>   *       will need to do more. If this hook is not implemented then the

>   *       default is to call @set_pc(tb->pc).

> - * @handle_mmu_fault: Callback for handling an MMU fault.

>   * @tlb_fill: Callback for handling a softmmu tlb miss or user-only

>   *       address fault.  For system mode, if the access is valid, call

>   *       tlb_set_page and return true; if the access is invalid, and

> @@ -198,8 +197,6 @@ typedef struct CPUClass {

>                                 Error **errp);

>      void (*set_pc)(CPUState *cpu, vaddr value);

>      void (*synchronize_from_tb)(CPUState *cpu, struct TranslationBlock *tb);

> -    int (*handle_mmu_fault)(CPUState *cpu, vaddr address, int size, int rw,

> -                            int mmu_index);

>      bool (*tlb_fill)(CPUState *cpu, vaddr address, int size,

>                       MMUAccessType access_type, int mmu_idx,

>                       bool probe, uintptr_t retaddr);

> diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c

> index f13c0b2b67..d79bed0266 100644

> --- a/accel/tcg/user-exec.c

> +++ b/accel/tcg/user-exec.c

> @@ -63,7 +63,6 @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info,

>  {

>      CPUState *cpu = current_cpu;

>      CPUClass *cc;

> -    int ret;

>      unsigned long address = (unsigned long)info->si_addr;

>      MMUAccessType access_type;

>  

> @@ -162,15 +161,9 @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info,

>      helper_retaddr = 0;

>  

>      cc = CPU_GET_CLASS(cpu);

> -    if (cc->tlb_fill) {

> -        access_type = is_write ? MMU_DATA_STORE : MMU_DATA_LOAD;

> -        cc->tlb_fill(cpu, address, 0, access_type, MMU_USER_IDX, false, pc);

> -        g_assert_not_reached();

> -    } else {

> -        ret = cc->handle_mmu_fault(cpu, address, 0, is_write, MMU_USER_IDX);

> -        g_assert(ret > 0);

> -        cpu_loop_exit_restore(cpu, pc);

> -    }

> +    access_type = is_write ? MMU_DATA_STORE : MMU_DATA_LOAD;

> +    cc->tlb_fill(cpu, address, 0, access_type, MMU_USER_IDX, false, pc);

> +    g_assert_not_reached();

>  }

>  

>  #if defined(__i386__)

>
diff mbox series

Patch

diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index 7e96a0aed3..8afcf0c427 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -118,7 +118,6 @@  struct TranslationBlock;
  *       This always includes at least the program counter; some targets
  *       will need to do more. If this hook is not implemented then the
  *       default is to call @set_pc(tb->pc).
- * @handle_mmu_fault: Callback for handling an MMU fault.
  * @tlb_fill: Callback for handling a softmmu tlb miss or user-only
  *       address fault.  For system mode, if the access is valid, call
  *       tlb_set_page and return true; if the access is invalid, and
@@ -198,8 +197,6 @@  typedef struct CPUClass {
                                Error **errp);
     void (*set_pc)(CPUState *cpu, vaddr value);
     void (*synchronize_from_tb)(CPUState *cpu, struct TranslationBlock *tb);
-    int (*handle_mmu_fault)(CPUState *cpu, vaddr address, int size, int rw,
-                            int mmu_index);
     bool (*tlb_fill)(CPUState *cpu, vaddr address, int size,
                      MMUAccessType access_type, int mmu_idx,
                      bool probe, uintptr_t retaddr);
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index f13c0b2b67..d79bed0266 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -63,7 +63,6 @@  static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info,
 {
     CPUState *cpu = current_cpu;
     CPUClass *cc;
-    int ret;
     unsigned long address = (unsigned long)info->si_addr;
     MMUAccessType access_type;
 
@@ -162,15 +161,9 @@  static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info,
     helper_retaddr = 0;
 
     cc = CPU_GET_CLASS(cpu);
-    if (cc->tlb_fill) {
-        access_type = is_write ? MMU_DATA_STORE : MMU_DATA_LOAD;
-        cc->tlb_fill(cpu, address, 0, access_type, MMU_USER_IDX, false, pc);
-        g_assert_not_reached();
-    } else {
-        ret = cc->handle_mmu_fault(cpu, address, 0, is_write, MMU_USER_IDX);
-        g_assert(ret > 0);
-        cpu_loop_exit_restore(cpu, pc);
-    }
+    access_type = is_write ? MMU_DATA_STORE : MMU_DATA_LOAD;
+    cc->tlb_fill(cpu, address, 0, access_type, MMU_USER_IDX, false, pc);
+    g_assert_not_reached();
 }
 
 #if defined(__i386__)