diff mbox series

[06/26] target/hppa: Convert to CPUClass::tlb_fill

Message ID 20190403034358.21999-7-richard.henderson@linaro.org
State Superseded
Headers show
Series tcg: Add CPUClass::tlb_fill | expand

Commit Message

Richard Henderson April 3, 2019, 3:43 a.m. UTC 
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/hppa/cpu.h        |  8 ++++----
 target/hppa/cpu.c        |  5 ++---
 target/hppa/mem_helper.c | 22 +++++++++++++++++-----
 3 files changed, 23 insertions(+), 12 deletions(-)

-- 
2.17.1

Comments

Peter Maydell April 30, 2019, 11:51 a.m. UTC | #1 
On Wed, 3 Apr 2019 at 04:49, Richard Henderson
<richard.henderson@linaro.org> wrote:
>

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

> ---

>  target/hppa/cpu.h        |  8 ++++----

>  target/hppa/cpu.c        |  5 ++---

>  target/hppa/mem_helper.c | 22 +++++++++++++++++-----

>  3 files changed, 23 insertions(+), 12 deletions(-)

>


Reviewed-by: Peter Maydell <peter.maydell@linaro.org>


thanks
-- PMM
Philippe Mathieu-Daudé May 8, 2019, 6:07 a.m. UTC | #2 
On 4/3/19 5:43 AM, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

> ---

>  target/hppa/cpu.h        |  8 ++++----

>  target/hppa/cpu.c        |  5 ++---

>  target/hppa/mem_helper.c | 22 +++++++++++++++++-----

>  3 files changed, 23 insertions(+), 12 deletions(-)

> 

> diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h

> index c062c7969c..e0e5d879e1 100644

> --- a/target/hppa/cpu.h

> +++ b/target/hppa/cpu.h

> @@ -360,10 +360,10 @@ int hppa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);

>  void hppa_cpu_do_interrupt(CPUState *cpu);

>  bool hppa_cpu_exec_interrupt(CPUState *cpu, int int_req);

>  void hppa_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function, int);

> -#ifdef CONFIG_USER_ONLY

> -int hppa_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size,

> -                              int rw, int midx);

> -#else

> +bool hppa_cpu_tlb_fill(CPUState *cs, vaddr address, int size,

> +                       MMUAccessType access_type, int mmu_idx,

> +                       bool probe, uintptr_t retaddr);

> +#ifndef CONFIG_USER_ONLY

>  int hppa_get_physical_address(CPUHPPAState *env, vaddr addr, int mmu_idx,

>                                int type, hwaddr *pphys, int *pprot);

>  extern const MemoryRegionOps hppa_io_eir_ops;

> diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c

> index 00bf444620..46750980f7 100644

> --- a/target/hppa/cpu.c

> +++ b/target/hppa/cpu.c

> @@ -167,9 +167,8 @@ static void hppa_cpu_class_init(ObjectClass *oc, void *data)

>      cc->synchronize_from_tb = hppa_cpu_synchronize_from_tb;

>      cc->gdb_read_register = hppa_cpu_gdb_read_register;

>      cc->gdb_write_register = hppa_cpu_gdb_write_register;

> -#ifdef CONFIG_USER_ONLY

> -    cc->handle_mmu_fault = hppa_cpu_handle_mmu_fault;

> -#else

> +    cc->tlb_fill = hppa_cpu_tlb_fill;

> +#ifndef CONFIG_USER_ONLY

>      cc->get_phys_page_debug = hppa_cpu_get_phys_page_debug;

>      dc->vmsd = &vmstate_hppa_cpu;

>  #endif

> diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c

> index c9b57d07c3..f61b0fdb9f 100644

> --- a/target/hppa/mem_helper.c

> +++ b/target/hppa/mem_helper.c

> @@ -25,8 +25,9 @@

>  #include "trace.h"

>  

>  #ifdef CONFIG_USER_ONLY

> -int hppa_cpu_handle_mmu_fault(CPUState *cs, vaddr address,

> -                              int size, int rw, int mmu_idx)

> +bool hppa_cpu_tlb_fill(CPUState *cs, vaddr address, int size,

> +                       MMUAccessType access_type, int mmu_idx,

> +                       bool probe, uintptr_t retaddr)

>  {

>      HPPACPU *cpu = HPPA_CPU(cs);

>  

> @@ -34,7 +35,7 @@ int hppa_cpu_handle_mmu_fault(CPUState *cs, vaddr address,

>         which would affect si_code.  */

>      cs->exception_index = EXCP_DMP;

>      cpu->env.cr[CR_IOR] = address;

> -    return 1;

> +    cpu_loop_exit_restore(cs, retaddr);


Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>


>  }

>  #else

>  static hppa_tlb_entry *hppa_find_tlb(CPUHPPAState *env, vaddr addr)

> @@ -214,8 +215,9 @@ hwaddr hppa_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)

>      return excp == EXCP_DTLB_MISS ? -1 : phys;

>  }

>  

> -void tlb_fill(CPUState *cs, target_ulong addr, int size,

> -              MMUAccessType type, int mmu_idx, uintptr_t retaddr)

> +bool hppa_cpu_tlb_fill(CPUState *cs, vaddr addr, int size,

> +                       MMUAccessType type, int mmu_idx,

> +                       bool probe, uintptr_t retaddr)

>  {

>      HPPACPU *cpu = HPPA_CPU(cs);

>      CPUHPPAState *env = &cpu->env;

> @@ -237,6 +239,9 @@ void tlb_fill(CPUState *cs, target_ulong addr, int size,

>      excp = hppa_get_physical_address(env, addr, mmu_idx,

>                                       a_prot, &phys, &prot);

>      if (unlikely(excp >= 0)) {

> +        if (probe) {

> +            return false;

> +        }

>          trace_hppa_tlb_fill_excp(env, addr, size, type, mmu_idx);

>          /* Failure.  Raise the indicated exception.  */

>          cs->exception_index = excp;

> @@ -253,6 +258,13 @@ void tlb_fill(CPUState *cs, target_ulong addr, int size,

>      /* Success!  Store the translation into the QEMU TLB.  */

>      tlb_set_page(cs, addr & TARGET_PAGE_MASK, phys & TARGET_PAGE_MASK,

>                   prot, mmu_idx, TARGET_PAGE_SIZE);

> +    return true;

> +}

> +

> +void tlb_fill(CPUState *cs, target_ulong addr, int size,

> +              MMUAccessType type, int mmu_idx, uintptr_t retaddr)

> +{

> +    hppa_cpu_tlb_fill(cs, addr, size, type, mmu_idx, false, retaddr);

>  }

>  

>  /* Insert (Insn/Data) TLB Address.  Note this is PA 1.1 only.  */

>
diff mbox series

Patch

diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index c062c7969c..e0e5d879e1 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -360,10 +360,10 @@  int hppa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
 void hppa_cpu_do_interrupt(CPUState *cpu);
 bool hppa_cpu_exec_interrupt(CPUState *cpu, int int_req);
 void hppa_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function, int);
-#ifdef CONFIG_USER_ONLY
-int hppa_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size,
-                              int rw, int midx);
-#else
+bool hppa_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
+                       MMUAccessType access_type, int mmu_idx,
+                       bool probe, uintptr_t retaddr);
+#ifndef CONFIG_USER_ONLY
 int hppa_get_physical_address(CPUHPPAState *env, vaddr addr, int mmu_idx,
                               int type, hwaddr *pphys, int *pprot);
 extern const MemoryRegionOps hppa_io_eir_ops;
diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
index 00bf444620..46750980f7 100644
--- a/target/hppa/cpu.c
+++ b/target/hppa/cpu.c
@@ -167,9 +167,8 @@  static void hppa_cpu_class_init(ObjectClass *oc, void *data)
     cc->synchronize_from_tb = hppa_cpu_synchronize_from_tb;
     cc->gdb_read_register = hppa_cpu_gdb_read_register;
     cc->gdb_write_register = hppa_cpu_gdb_write_register;
-#ifdef CONFIG_USER_ONLY
-    cc->handle_mmu_fault = hppa_cpu_handle_mmu_fault;
-#else
+    cc->tlb_fill = hppa_cpu_tlb_fill;
+#ifndef CONFIG_USER_ONLY
     cc->get_phys_page_debug = hppa_cpu_get_phys_page_debug;
     dc->vmsd = &vmstate_hppa_cpu;
 #endif
diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c
index c9b57d07c3..f61b0fdb9f 100644
--- a/target/hppa/mem_helper.c
+++ b/target/hppa/mem_helper.c
@@ -25,8 +25,9 @@ 
 #include "trace.h"
 
 #ifdef CONFIG_USER_ONLY
-int hppa_cpu_handle_mmu_fault(CPUState *cs, vaddr address,
-                              int size, int rw, int mmu_idx)
+bool hppa_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
+                       MMUAccessType access_type, int mmu_idx,
+                       bool probe, uintptr_t retaddr)
 {
     HPPACPU *cpu = HPPA_CPU(cs);
 
@@ -34,7 +35,7 @@  int hppa_cpu_handle_mmu_fault(CPUState *cs, vaddr address,
        which would affect si_code.  */
     cs->exception_index = EXCP_DMP;
     cpu->env.cr[CR_IOR] = address;
-    return 1;
+    cpu_loop_exit_restore(cs, retaddr);
 }
 #else
 static hppa_tlb_entry *hppa_find_tlb(CPUHPPAState *env, vaddr addr)
@@ -214,8 +215,9 @@  hwaddr hppa_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
     return excp == EXCP_DTLB_MISS ? -1 : phys;
 }
 
-void tlb_fill(CPUState *cs, target_ulong addr, int size,
-              MMUAccessType type, int mmu_idx, uintptr_t retaddr)
+bool hppa_cpu_tlb_fill(CPUState *cs, vaddr addr, int size,
+                       MMUAccessType type, int mmu_idx,
+                       bool probe, uintptr_t retaddr)
 {
     HPPACPU *cpu = HPPA_CPU(cs);
     CPUHPPAState *env = &cpu->env;
@@ -237,6 +239,9 @@  void tlb_fill(CPUState *cs, target_ulong addr, int size,
     excp = hppa_get_physical_address(env, addr, mmu_idx,
                                      a_prot, &phys, &prot);
     if (unlikely(excp >= 0)) {
+        if (probe) {
+            return false;
+        }
         trace_hppa_tlb_fill_excp(env, addr, size, type, mmu_idx);
         /* Failure.  Raise the indicated exception.  */
         cs->exception_index = excp;
@@ -253,6 +258,13 @@  void tlb_fill(CPUState *cs, target_ulong addr, int size,
     /* Success!  Store the translation into the QEMU TLB.  */
     tlb_set_page(cs, addr & TARGET_PAGE_MASK, phys & TARGET_PAGE_MASK,
                  prot, mmu_idx, TARGET_PAGE_SIZE);
+    return true;
+}
+
+void tlb_fill(CPUState *cs, target_ulong addr, int size,
+              MMUAccessType type, int mmu_idx, uintptr_t retaddr)
+{
+    hppa_cpu_tlb_fill(cs, addr, size, type, mmu_idx, false, retaddr);
 }
 
 /* Insert (Insn/Data) TLB Address.  Note this is PA 1.1 only.  */