diff mbox series

[v4,60/69] target/arm: Split gen_nop_hint

Message ID 20190904193059.26202-61-richard.henderson@linaro.org
State Accepted
Commit 279de61a21a1622cb875ead82d6e78c989ba2966
Headers show
Series target/arm: Convert aa32 base isa to decodetree | expand

Commit Message

Richard Henderson Sept. 4, 2019, 7:30 p.m. UTC
Now that all callers pass a constant value, split the switch
statement into the individual trans_* functions.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/arm/translate.c | 67 +++++++++++++++---------------------------
 1 file changed, 24 insertions(+), 43 deletions(-)

-- 
2.17.1

Comments

Philippe Mathieu-Daudé Sept. 5, 2019, 10:48 a.m. UTC | #1
On 9/4/19 9:30 PM, Richard Henderson wrote:
> Now that all callers pass a constant value, split the switch

> statement into the individual trans_* functions.

> 

> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

> ---

>  target/arm/translate.c | 67 +++++++++++++++---------------------------

>  1 file changed, 24 insertions(+), 43 deletions(-)

> 

> diff --git a/target/arm/translate.c b/target/arm/translate.c

> index 69092c12c3..d076c962ea 100644

> --- a/target/arm/translate.c

> +++ b/target/arm/translate.c

> @@ -3061,46 +3061,6 @@ static void gen_exception_return(DisasContext *s, TCGv_i32 pc)

>      gen_rfe(s, pc, load_cpu_field(spsr));

>  }

>  

> -/*

> - * For WFI we will halt the vCPU until an IRQ. For WFE and YIELD we

> - * only call the helper when running single threaded TCG code to ensure

> - * the next round-robin scheduled vCPU gets a crack. In MTTCG mode we

> - * just skip this instruction. Currently the SEV/SEVL instructions

> - * which are *one* of many ways to wake the CPU from WFE are not

> - * implemented so we can't sleep like WFI does.

> - */

> -static void gen_nop_hint(DisasContext *s, int val)

> -{

> -    switch (val) {

> -        /* When running in MTTCG we don't generate jumps to the yield and

> -         * WFE helpers as it won't affect the scheduling of other vCPUs.

> -         * If we wanted to more completely model WFE/SEV so we don't busy

> -         * spin unnecessarily we would need to do something more involved.

> -         */

> -    case 1: /* yield */

> -        if (!(tb_cflags(s->base.tb) & CF_PARALLEL)) {

> -            gen_set_pc_im(s, s->base.pc_next);

> -            s->base.is_jmp = DISAS_YIELD;

> -        }

> -        break;

> -    case 3: /* wfi */

> -        gen_set_pc_im(s, s->base.pc_next);

> -        s->base.is_jmp = DISAS_WFI;

> -        break;

> -    case 2: /* wfe */

> -        if (!(tb_cflags(s->base.tb) & CF_PARALLEL)) {

> -            gen_set_pc_im(s, s->base.pc_next);

> -            s->base.is_jmp = DISAS_WFE;

> -        }

> -        break;

> -    case 4: /* sev */

> -    case 5: /* sevl */

> -        /* TODO: Implement SEV, SEVL and WFE.  May help SMP performance.  */

> -    default: /* nop */

> -        break;

> -    }

> -}

> -

>  #define CPU_V001 cpu_V0, cpu_V0, cpu_V1

>  

>  static inline void gen_neon_add(int size, TCGv_i32 t0, TCGv_i32 t1)

> @@ -8194,19 +8154,40 @@ DO_SMLAWX(SMLAWT, 1, 1)

>  

>  static bool trans_YIELD(DisasContext *s, arg_YIELD *a)

>  {

> -    gen_nop_hint(s, 1);

> +    /*

> +     * When running single-threaded TCG code, use the helper to ensure that

> +     * the next round-robin scheduled vCPU gets a crack.  When running in

> +     * MTTCG we don't generate jumps to the helper as it won't affect the

> +     * scheduling of other vCPUs.

> +     */

> +    if (!(tb_cflags(s->base.tb) & CF_PARALLEL)) {

> +        gen_set_pc_im(s, s->base.pc_next);

> +        s->base.is_jmp = DISAS_YIELD;

> +    }

>      return true;

>  }

>  

>  static bool trans_WFE(DisasContext *s, arg_WFE *a)

>  {

> -    gen_nop_hint(s, 2);

> +    /*

> +     * When running single-threaded TCG code, use the helper to ensure that

> +     * the next round-robin scheduled vCPU gets a crack.  In MTTCG mode we

> +     * just skip this instruction.  Currently the SEV/SEVL instructions,

> +     * which are *one* of many ways to wake the CPU from WFE, are not

> +     * implemented so we can't sleep like WFI does.

> +     */

> +    if (!(tb_cflags(s->base.tb) & CF_PARALLEL)) {

> +        gen_set_pc_im(s, s->base.pc_next);

> +        s->base.is_jmp = DISAS_WFE;

> +    }

>      return true;

>  }

>  

>  static bool trans_WFI(DisasContext *s, arg_WFI *a)

>  {

> -    gen_nop_hint(s, 3);

> +    /* For WFI, halt the vCPU until an IRQ. */

> +    gen_set_pc_im(s, s->base.pc_next);

> +    s->base.is_jmp = DISAS_WFI;

>      return true;

>  }


Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
diff mbox series

Patch

diff --git a/target/arm/translate.c b/target/arm/translate.c
index 69092c12c3..d076c962ea 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -3061,46 +3061,6 @@  static void gen_exception_return(DisasContext *s, TCGv_i32 pc)
     gen_rfe(s, pc, load_cpu_field(spsr));
 }
 
-/*
- * For WFI we will halt the vCPU until an IRQ. For WFE and YIELD we
- * only call the helper when running single threaded TCG code to ensure
- * the next round-robin scheduled vCPU gets a crack. In MTTCG mode we
- * just skip this instruction. Currently the SEV/SEVL instructions
- * which are *one* of many ways to wake the CPU from WFE are not
- * implemented so we can't sleep like WFI does.
- */
-static void gen_nop_hint(DisasContext *s, int val)
-{
-    switch (val) {
-        /* When running in MTTCG we don't generate jumps to the yield and
-         * WFE helpers as it won't affect the scheduling of other vCPUs.
-         * If we wanted to more completely model WFE/SEV so we don't busy
-         * spin unnecessarily we would need to do something more involved.
-         */
-    case 1: /* yield */
-        if (!(tb_cflags(s->base.tb) & CF_PARALLEL)) {
-            gen_set_pc_im(s, s->base.pc_next);
-            s->base.is_jmp = DISAS_YIELD;
-        }
-        break;
-    case 3: /* wfi */
-        gen_set_pc_im(s, s->base.pc_next);
-        s->base.is_jmp = DISAS_WFI;
-        break;
-    case 2: /* wfe */
-        if (!(tb_cflags(s->base.tb) & CF_PARALLEL)) {
-            gen_set_pc_im(s, s->base.pc_next);
-            s->base.is_jmp = DISAS_WFE;
-        }
-        break;
-    case 4: /* sev */
-    case 5: /* sevl */
-        /* TODO: Implement SEV, SEVL and WFE.  May help SMP performance.  */
-    default: /* nop */
-        break;
-    }
-}
-
 #define CPU_V001 cpu_V0, cpu_V0, cpu_V1
 
 static inline void gen_neon_add(int size, TCGv_i32 t0, TCGv_i32 t1)
@@ -8194,19 +8154,40 @@  DO_SMLAWX(SMLAWT, 1, 1)
 
 static bool trans_YIELD(DisasContext *s, arg_YIELD *a)
 {
-    gen_nop_hint(s, 1);
+    /*
+     * When running single-threaded TCG code, use the helper to ensure that
+     * the next round-robin scheduled vCPU gets a crack.  When running in
+     * MTTCG we don't generate jumps to the helper as it won't affect the
+     * scheduling of other vCPUs.
+     */
+    if (!(tb_cflags(s->base.tb) & CF_PARALLEL)) {
+        gen_set_pc_im(s, s->base.pc_next);
+        s->base.is_jmp = DISAS_YIELD;
+    }
     return true;
 }
 
 static bool trans_WFE(DisasContext *s, arg_WFE *a)
 {
-    gen_nop_hint(s, 2);
+    /*
+     * When running single-threaded TCG code, use the helper to ensure that
+     * the next round-robin scheduled vCPU gets a crack.  In MTTCG mode we
+     * just skip this instruction.  Currently the SEV/SEVL instructions,
+     * which are *one* of many ways to wake the CPU from WFE, are not
+     * implemented so we can't sleep like WFI does.
+     */
+    if (!(tb_cflags(s->base.tb) & CF_PARALLEL)) {
+        gen_set_pc_im(s, s->base.pc_next);
+        s->base.is_jmp = DISAS_WFE;
+    }
     return true;
 }
 
 static bool trans_WFI(DisasContext *s, arg_WFI *a)
 {
-    gen_nop_hint(s, 3);
+    /* For WFI, halt the vCPU until an IRQ. */
+    gen_set_pc_im(s, s->base.pc_next);
+    s->base.is_jmp = DISAS_WFI;
     return true;
 }